Course Calendar
We provide a range of courses including hands-on labs, interactive discussions & best practices to leverage your success. We offer online and in-person training, as well as private training. Our BLT training center is located in Columbia, MD. Class location is noted on the calendar.
View the calendar below or find a class another way:
COURSE SCHEDULE
COURSE | CLASS DATE | LOCATION | STATUS |
---|---|---|---|
See All On-Demand Webinars | On-Demand | Recorded | View |
WEBINAR: Getting Started with Kria SOM | On-Demand | Recorded | Watch |
BLT Exclusive: Advanced Debug Techniques for Hardware Engineers | January 12, 2023 | Live E-Learning | Closed |
BLT Exclusive: Xilinx for Managers | January 17, 2023 | Live E-Learning | Closed |
Dynamic Function eXchange (DFX) Using the Vivado Design Suite | January 17-18, 2023 | Live E-Learning | 9 seats left |
Designing with Versal AI Engine 3: Kernel Programming and Optimization | January 18-19, 2023 | Live E-Learning | Closed |
BLT Exclusive: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC | January 24-26, 2023 | Live E-Learning | Closed |
Designing with VHDL | January 31 - February 3, 2023 | BLT Training Center | Private |
Designing with the Zynq UltraScale+ RFSoC | January 31 - February 1, 2023 | Live E-Learning | 3 seats left |
Embedded Design with PetaLinux Tools | February 7-8, 2023 | Live E-Learning | 8 seats left |
Vivado Boot Camp for the FPGA User Phase 1: FPGA Essentials – Architecture, Memory and IO | February 14-16, 2023 | BLT Training Center | Private |
Designing with VHDL | February 14-16, 2023 | Live E-Learning | 3 seats left |
Designing and Verification with SystemVerilog | February 21-23, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Versal ACAP: Network on Chip No-Cost Workshop | February 22, 2023 | Live E-Learning | LIMITED SEATS |
Designing with the Versal ACAP: Architecture and Methodology | February 28 - March 2, 2023 | Live E-Learning | 9 seats left |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 1: FPGA Essentials – Architecture, Memory and IO | March 7-9, 2023 | Live E-Learning | 3 seats left |
High-Level Synthesis with the Vitis HLS Tool | March 14-15, 2023 | Live E-Learning | 9 Seats Left |
Designing with Verilog | March 14-16, 2023 | Live E-Learning | 2 seats left |
Vivado Boot Camp for the FPGA User Phase 2: Tcl Scripting, IP Creation and Debugging | March 21-23, 2023 | BLT Training Center | Private |
Designing with the Versal ACAP: Network on Chip | March 21, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 1 | March 22-23, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 2: Tcl Scripting, IP Creation and Debugging | March 28-30, 2023 | Live E-Learning | 9 seats left |
BLT Exclusive: Spartan-6 / ISE User Migration Training | March 28-30, 2023 | Live E-Learning | 9 seats left |
Vitis Model Composer: A MATLAB and Simulink-based Product | April 4-6, 2023 | Live E-Learning | 9 Seats Left |
April 4-6, 2023 | Live E-Learning | Confirmed | |
Designing with Versal AI Engine 2 | April 11-12, 2023 | Live E-Learning | Confirmed |
Designing with the Versal ACAP: Power and Board Design | April 13, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 3: Floorplanning and Advanced Timing Closure | April 18-20, 2023 | Live E-Learning | Confirmed |
Dynamic Function eXchange (DFX) Using the Vivado Design Suite | April 25-26, 2023 | Live E-Learning | 8 seats left |
BLT Exclusive: Advanced Debug Techniques for Hardware Engineers | April 25, 2023 | Live E-Learning | 9 Seats Left |
BLT Exclusive: Xilinx for Managers | May 2, 2023 | Live E-Learning | 9 seats left |
Designing with Versal AI Engine 3: Kernel Programming and Optimization | May 3-4, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC | May 9-11, 2023 | Live E-Learning | Confirmed |
Designing with the Zynq® UltraScale+™ RFSoC | May 16-17, 2023 | Live E-Learning | Confirmed |
Embedded Design with PetaLinux Tools | May 23-24, 2023 | Live E-Learning | Confirmed |
Designing with VHDL | June 6-8, 2023 | Live E-Learning | Confirmed |
Designing with Verilog | June 13-15, 2023 | Live E-Learning | Confirmed |
Designing with the Versal ACAP: Architecture and Methodology | June 20-22, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 1: FPGA Essentials – Architecture, Memory and IO | June 27-29, 2023 | Live E-Learning | Confirmed |
High-Level Synthesis with the Vitis HLS Tool | July 18-19, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Designing and Verification with SystemVerilog | July 18-20, 2023 | Live E-Learning | Confirmed |
Designing with the Versal ACAP: Network on Chip | July 25, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 1 | July 26-27, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 2: Tcl Scripting, IP Creation and Debugging | August 1-3, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Spartan-6 / ISE User Migration Training | August 1-3, 2023 | Live E-Learning | Confirmed |
Vitis Model Composer: A MATLAB and Simulink-based Product | August 8-10, 2023 | Live E-Learning | Confirmed |
August 8-10, 2023 | Live E-Learning | Confirmed | |
Designing with Versal AI Engine 2 | August 15-16, 2023 | Live E-Learning | Confirmed |
Designing with the Versal ACAP: Power and Board Design | August 17, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 3: Floorplanning and Advanced Timing Closure | August 22-24, 2023 | Live E-Learning | Confirmed |
Dynamic Function eXchange (DFX) Using the Vivado Design Suite | August 22-24, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Advanced Debug Techniques for Hardware Engineers | August 29, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Xilinx for Managers | September 5, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 3: Kernel Programming and Optimization | September 6-7, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC | September 12-14, 2023 | Live E-Learning | Confirmed |
Designing with the Zynq® UltraScale+™ RFSoC | September 19-20, 2023 | Live E-Learning | Confirmed |
Embedded Design with PetaLinux Tools | September 26-27, 2023 | Live E-Learning | Confirmed |
My instructor was very professional
My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.
– Student from Vivado Boot Camp for the FPGA User Phase 1
Thanks for a great class!
I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!
– Student from Vivado Boot Camp for the FPGA User Phase 1
Labs were great
The labs were great and really reinforced the topics.
– Student from Designing with Versal AI Engine 1: Architecture and Design Flow
I had a wonderful instructor
I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.
– Student from Vivado Boot Camp for the FPGA User Phase 3
Expert tidbits
I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.
– Student from Designing with VHDL
My instructor was very capable
My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question
– Student from Vivado Boot Camp for the FPGA User Phase 1
Elie was an exceptional instructor
Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.
– Student from Designing with Verilog
All in all a great experience.
Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.
– Student from Vivado Boot Camp for the FPGA User Phase 2
Impressed with the effort
Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.
– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization
Knowledgeable instructor
Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.
– Student from Designing with VHDL
My instructor took time
My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.
– Student from Vivado Boot Camp for the FPGA User Phase 3
Erich was engaging
Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.
– Student from Vivado Boot Camp for the FPGA User Phase 1
College course fit into 3 days
The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.
– Student from Designing with VDHL