Course Calendar
We provide a range of courses including hands-on labs, interactive discussions & best practices to leverage your success. We offer online and in-person training, as well as private training. Our BLT training center is located in Columbia, MD. Class location is noted on the calendar.
View the calendar below or find a class another way:
COURSE SCHEDULE
COURSE | CLASS DATE | LOCATION | STATUS |
---|---|---|---|
See All On-Demand Webinars | On-Demand | Recorded | View |
WEBINAR: Getting Started with Kria SOM | On-Demand | Recorded | Watch |
WEBINAR: HLS: What Is It and When Do You Use It? | On-Demand | Recorded | Watch |
June 6-7, 2023 | Live E-Learning | Closed | |
Designing with VHDL | June 6-8, 2023 | Live E-Learning | 7 seats left |
BLT Exclusive: Xilinx for Managers | June 13, 2023 | Live E-Learning | 9 seats left |
Designing with Verilog | June 13-15, 2023 | Live E-Learning | 2 seats left |
Designing with Versal AI Engine 3: Kernel Programming and Optimization | June 14-15, 2023 | Live E-Learning | 9 seats left |
Workshop: Vitis Model Composer (Sponsored by AMD Xilinx) | June 21, 2023 | Live E-Learning | LIMITED SEATS |
Designing with the Versal ACAP: Architecture and Methodology | June 20-22, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 1: FPGA Essentials – Architecture, Memory and IO | June 27-29, 2023 | Live E-Learning | 9 seats left |
Vitis Model Composer: A MATLAB and Simulink-based Product | July 11-13, 2023 | Live E-Learning | Private Onsite |
Designing with the Zynq® UltraScale+™ RFSoC | July 18-19, 2023 | Live E-Learning | 7 seats left |
BLT Exclusive: Designing and Verification with SystemVerilog | July 18-20, 2023 | Live E-Learning | 9 seats left |
Designing with the Versal ACAP: Network on Chip | July 25, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 1 | July 26-27, 2023 | Live E-Learning | Confirmed |
Webinar: Dark Mode in Vitis: The New IDE | July 26, 2023 @ 2PM ET | Live E-Learning | Register |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 2: Tcl Scripting, IP Creation and Debugging | August 1-3, 2023 | Live E-Learning | 8 seats left |
BLT Exclusive: Spartan-6 / ISE User Migration Training | August 1-3, 2023 | Live E-Learning | Confirmed |
Vitis Model Composer: A MATLAB and Simulink-based Product | August 8-10, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 2 | August 15-16, 2023 | Live E-Learning | Confirmed |
August 15-16, 2023 | Live E-Learning | Confirmed | |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 3: Floorplanning and Advanced Timing Closure | August 22-24, 2023 | Live E-Learning | 6 seats left |
No-Cost Workshop: The 3 Vs: Vitis, Versal and Vivado (Sponsored by AMD Xilinx) | August 23, 2023 | Live E-Learning | LIMITED SEATS |
August 29-30, 2023 | Live E-Learning | Confirmed | |
BLT Exclusive: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC | September 12-14, 2023 | Live E-Learning | 9 seats left |
Embedded Design with PetaLinux Tools | September 19-20, 2023 | Live E-Learning | Confirmed |
UltraFast Design Methodology | September 19-20, 2023 | Live E-Learning | Confirmed |
Webinar: Verification | September 20, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 3: Kernel Programming and Optimization | September 26-27, 2023 | Live E-Learning | Confirmed |
October 3-4, 2023 | Live E-Learning | Confirmed | |
Designing with VHDL | October 3-5, 2023 | Live E-Learning | Confirmed |
Designing with Verilog | October 10-13, 2023 | Live E-Learning | Confirmed |
Designing with the Versal ACAP: Architecture and Methodology | October 17-19, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Xilinx for Managers | October 17, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 1: FPGA Essentials – Architecture, Memory and IO | October 24-26, 2023 | Live E-Learning | Confirmed |
Dynamic Function eXchange (DFX) Using the Vivado Design Suite | October 24-25, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Designing and Verification with SystemVerilog | Oct 31-Nov 2, 2023 | Live E-Learning | Confirmed |
October 31, 2023 | Live E-Learning | Confirmed | |
Workshop: Introduction to AXI / AXI Verification IP | November 1, 2023 | Live E-Learning | Coming Soon |
Designing with the Versal ACAP: Network on Chip | November 7, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 1 | November 8-9, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 2: Tcl Scripting, IP Creation and Debugging | November 14-16, 2023 | Live E-Learning | Confirmed |
Webinar: Space Application RFSoCs / State Machines | November 15, 2023 | Live E-Learning | Coming Soon |
Vitis Model Composer: A MATLAB and Simulink-based Product | November 28-30, 2023 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 2 | December 5-6, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Vivado Boot Camp for the FPGA User Phase 3: Floorplanning and Advanced Timing Closure | December 12-14, 2023 | Live E-Learning | Confirmed |
BLT Exclusive: Advanced Debugging Workshop (Sponsored by AMD Xilinx) | December 13, 2023 | Live E-Learning | LIMITED SEATS |
January 9-10, 2024 | Live E-Learning | Confirmed | |
Designing with the Zynq® UltraScale+™ RFSoC | January 16-17, 2024 | Live E-Learning | Confirmed |
BLT Exclusive: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC | January 23-25, 2024 | Live E-Learning | Confirmed |
BLT Exclusive: Designing an Integrated PCI Express System (Versal / UltraScale) | January 23-24, 2024 | Live E-Learning | Confirmed |
Embedded Design with PetaLinux Tools | January 30-31, 2024 | Live E-Learning | Confirmed |
Webinar: Channelizer Design | January 31, 2024 | Live E-Learning | Confirmed |
Designing with Versal AI Engine 3: Kernel Programming and Optimization | February 6-7, 2024 | Live E-Learning | Confirmed |
February 6-7, 2024 | Live E-Learning | Confirmed |
BLT and the instructor did a phenomenal job
BLT and specifically Kolton did a phenomenal job teaching this course. He was patient to answer everyone’s questions and help us with any issues we were having. Kolton really tried to help us learn the material.
– Student from High-Level Synthesis with the Vitis HLS Tool
This one was definitely one of the best
I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!
– Student from Vivado Boot Camp for the FPGA User Phase 1
My instructor was very capable
My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question
– Student from Vivado Boot Camp for the FPGA User Phase 1
Thanks for a great class!
I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!
– Student from Vivado Boot Camp for the FPGA User Phase 1
I would endorse him to teach a friend
Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.
– Student from Designing with Verilog
Erich was engaging
Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.
– Student from Vivado Boot Camp for the FPGA User Phase 1
A lot of insights beyond the course
Glenn was a great instructor and provided us with a lot of insights beyond the course material
– Student from Embedded Design with PetaLinux Tools
My instructor was very professional
My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.
– Student from Vivado Boot Camp for the FPGA User Phase 1
Impressed with the effort
Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.
– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization
All in all a great experience
Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.
– Student from Vivado Boot Camp for the FPGA User Phase 2
Knowledgeable instructor
Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.
– Student from Designing with VHDL
Expert tidbits
I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.
– Student from Designing with VHDL
I gained a lot of information
The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!
– Student from Vivado Boot Camp for the FPGA User Phase 1
The instructor was excellent
The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.
– Student from Embedded Design with PetaLinux Tools
College course fit into 3 days
The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.
– Student from Designing with VDHL
My instructor took time
My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.
– Student from Vivado Boot Camp for the FPGA User Phase 3
They had answers for just about every question
Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.
– Student from Vivado Boot Camp for the FPGA User Phase 2
Elie was an exceptional instructor
Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.
– Student from Designing with Verilog
Can quickly and concisely answer technical questions
I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!
– Student from Vivado Boot Camp for the FPGA User Phase 3
I had a wonderful instructor
I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.
– Student from Vivado Boot Camp for the FPGA User Phase 3
Labs were great
The labs were great and really reinforced the topics.
– Student from Designing with Versal AI Engine 1: Architecture and Design Flow