Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

Our exclusive class thoroughly covers modules from these Xilinx^® courses:

Zynq UltraScale+ MPSoC for the Hardware Designer
Embedded Systems Design
Designing with the UltraScale and UltraScale+ Architectures
Designing with the IP Integrator Tool

This course is designed to bring FPGA designers up to speed developing embedded systems using the Vivado^® Design Suite. The features and capabilities of the Zynq^® UltraScale+^™ MPSoC and the Zynq-7000 SoC are covered in lectures, demonstrations and labs, along with general embedded concepts, tools and techniques. Additionally, advanced embedded topics included in this course cover the implementation of level 1 and level 2 device drivers, Asynchronous Multiprocessing (AMP), and Xilinx’s embedded operating system, PetaLinux. The hands-on labs utilizing actual Xilinx ZCU104 Evaluation Boards provide students with experience designing, expanding and modifying an embedded system, including booting techniques and hardware-software co-debugging.

This is an advanced class. Those not meeting the prerequisites will struggle.

See Course Outline

3-Day Instructor-led Course	Price USD	Training Credits
Hosted Online - $299/day	$897	9
In-Person Registration - $399/day	$1197	12
Printed Course Book (A PDF book is included in the course fee)	$100	1
Private Training	Contact Us	Contact Us
Follow on Coaching	Contact Us	Contact Us

Scheduled Classes

Live Online Training (9am-5pm ET)

May 9-11, 2023 | Register Today

September 12-14, 2023 | Register Today

January 23-25, 2024 | Register Today

View our Full Calendar for class date status.

(Confirmed, Closed, Full)

Training Duration:

3 Days

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Who should attend:

Engineers who are interested in developing embedded systems with the Zynq UltraScale+ MPSoC and Xilinx Zynq-7000 SoC using Vivado Design Suite and Vitis^™.

Skills Gained

After completing this comprehensive training, you will know how to:

Describe the various tools that encompass a Xilinx embedded design
Rapidly architect an embedded system containing an ARM^™ based processor using the Vivado IP integrator and Customization Wizard
Utilizing Vitis for embedded software applications
Create and integrate an IP-based processing system component in the Vivado Design Suite
Design and add custom AXI interface-based peripherals to an embedded processing system
Simulate custom AXI interface-based peripherals using the AXI Verification IP

Course Outline

Day 1	Day 2	Day 3
Embedded UltraFast™ Design Methodology Overview of Embedded Hardware Development Driving the IP Integrator Tool LAB: Driving the IP Integrator Tool Introduction to the 7 Series Architecture Introduction to the UltraScale Architecture Introduction to the UltraScale+ Families AXI Introduction AXI Variations AXI Transactions AXI Connecting AXI IP LAB: Building Custom AXI IP Zynq-7000 SoC Architecture Overview Zynq UltraScale+ MPSoC Architectural Overview LAB: Exploring the Architecture of the Zynq UltraScale+ MPSoC Driving the Vitis Tool LAB: Driving Vitis Tool	Zynq UltraScale+ MPSoC Clocking Zynq UltraScale+ MPSoC APU Overview Zynq UltraScale+ MPSoC APU Cortex^®-A53 Processor Zynq UltraScale+ MPSoC RPU Introduction Zynq UltraScale+ MPSoC RPU TCM Architecture Zynq UltraScale+ MPSoC PMU Introduction Zynq UltraScale+ MPSoC PMU and the IPIs LAB: Managing Power for Other Processors Introduction to Interrupts Hypervisors Introduction ARM TrustZone Technology Overview Zynq UltraScale+ MPSoC DDR Sharing PS Resources (Hardware Perspective) LAB: Sharing PS Resources (Hardware Perspective) LAB: Sharing PS Resources (Software Perspective) Zynq UltraScale+ MPSoC Boot and Configuration Zynq UltraScale+ MPSoC Boot Image FSBL Introduction	LAB: Loading the PL from Software AXI BFM Simulation Using Verification LAB: Introduction to Verification IP Simulation Hardware-Software Co-Debugging (Cross-Triggering) LAB: Debugging Using Cross-Triggering Understanding Device Drivers LAB: Standalone Application Development Operating Systems Introduction and Concepts Linux A High-Level Introduction Yocto Relationship with PetaLinux Creating a Linux Image and Application Using PetaLinux Tools QEMU Introduction Standalone Software Platform Development Introduction to HLS

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

Experience using the Vivado Design Suite
Experience using the C programming language
Experience using VHDL or Verilog
A basic understanding of microprocessors

RELATED COURSES:

Updated 3-22-2023

©2023 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.