Operating Systems and Hypervisors in Adaptive SoCs (formerly called ACAPs)

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Operating Systems and Hypervisors in Adaptive SoCs (formerly called ACAPs)

This course provides software developers options and techniques for selecting and implementing various types of operating systems and hypervisors on Zynq® UltraScale+™ MPSoC and Versal® Adaptive SoC (formerly Versal ACAP) devices.

The emphasis is on:

  • Exploring the capabilities of the application processing unit (APU)and real-time processing unit (RPU) relative to performance improvement and OS implementation
  • Reviewing the catalog of OS implementation options, including Arm® TrustZone technology, hypervisors, and various Linux implementations
  • Applying various power management techniques for the Zynq UltraScale+ MPSoC and Versal Adaptive SoC (ACAP) families

This course focuses on the Zynq UltraScale+ MPSoC and Versal Adaptive SoC (ACAP) architectures.

See Course Outline

3-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $299/day$8979
In-Person Registration - $399/day$119712
Printed Course Book (A PDF book is included in the course fee)$1001
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Scheduled Classes

No Scheduled Sessions - Contact Us to ask about setting one up!

View our Full Calendar for class date status.
(Confirmed, Closed, Full)

Training Duration:

3 Days

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The BLT Adaptive Computing Summit

Emerging Solutions for Outer Space, Undersea, and Everywhere in Between

April 25: Columbia, MD  •   May 2: Melbourne, FL  •   May 4: Orlando, FL  •   May 17: Huntsville, AL

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Who should attend:

Software developers interested in understanding popular OS and hypervisor options and other high-level system design issues.

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:

  • Leverage the innate capabilities of the application processing unit (APU) and real-time processing unit (RPU)
  • Investigate Arm TrustZone technology
  • Explore the concept of hypervisors and implement a Xen hypervisor example
  • Implement Linux solutions, including asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP) configurations
  • Deploy FreeRTOS in the RPU
  • Effectively use power management strategies

Course Outline

Day 1Day 2Day 3
Application Processing Unit
Introduction to the members of the APU, specifically the Cortex™-A53 processor and how the cluster is configured and managed. {Lectures, Lab}

Real-Time Processing Unit
Focuses on the real-time processing module (RPU) in the PS, which is comprised of a pair of Cortex processors and supporting elements. {Lectures, Demo, Lab}

Arm TrustZone Technology
Illustrates the use of Arm TrustZone technology. {Lectures}

QEMU
Introduction to the Quick Emulator, which is the tool used to run software for a device when hardware is not available. {Lectures, Demo, Labs}

HW-SW Virtualization
Covers the hardware and software elements of virtualization. The lab demonstrates how hypervisors can be used. {Lecture, Demo}		Multiprocessor Software Architecture
Focuses on how multiple processors can communicate with each other using both software and hardware techniques. {Lecture}

Xen Hypervisor
Discusses generic hypervisors and reviews some of the details of implementing a hypervisor using Xen. {Lectures, Demo, Lab}

OpenAMP
Discusses how the OpenAMP framework can be used to construct systems containing both Linux and Standalone applications within the APU. {Lectures, Lab}

Linux
Describes how to configure Linux to manage multiple processors. {Lectures, Demos}

Driving the PetaLinux Tool
Introduces the basic concepts required to build an application using the PetaLinux tool. {Lecture, Lab}

Yocto
Compares and contrasts the kernel building methods between a "pure" Yocto build and the PetaLinux build (which uses Yocto "under the hood"). {Lectures, Lab}

Open-Source Library (Linux)
Introduction to open-source Linux and how the PetaLinux tools reduce effort and risk. {Lectures, Demo}		FreeRTOS
Overview of FreeRTOS with examples of how it can be used. {Lectures, Demo, Lab}

Software Stack
Introduction to what a software stack is and a number of commonly used stacks. {Lectures, Demo}

Power Management
Overview of the PMU and the power-saving features of the device. {Lectures, Lab}

Please note: The instructor may change the content order to provide a better learning experience.

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They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

– Student from Vivado Boot Camp for the FPGA User Phase 3

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

– Student from Vivado Boot Camp for the FPGA User Phase 3

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

– Student from Designing with VHDL

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

BLT and the instructor did a phenomenal job

BLT and specifically Kolton did a phenomenal job teaching this course. He was patient to answer everyone’s questions and help us with any issues we were having. Kolton really tried to help us learn the material.

– Student from High-Level Synthesis with the Vitis HLS Tool

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

– Student from Designing with VDHL

This one was definitely one of the best

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

Prerequisites:

  • General understanding of C coding
  • Familiarity with issues related to complex embedded systems

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Updated 3-22-2023
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