Embedded Design with PetaLinux Tools

This intermediate-level course provides embedded systems developers with experience in creating an embedded Linux system targeting a Zynq® All Programmable System on a Chip (SoC) processor and Zynq UltraScale+ MPSoC processor development board using PetaLinux Tools. The course offers students hands-on experience with building the environment and booting the system using a Zynq All Programmable SoC or Zynq UltraScale MPSoC design with PetaLinux Tools on the ARM Cortex®-A9 or Cortex®-A53 processor.

This course also introduces embedded Linux components, use of open-source components, environment configurations, network components, and debugging options for embedded Linux platforms. The primary focus is on embedded Linux development in conjunction with the Xilinx® tool flow.

See Course Outline

3-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $299/day$8979
In-Person Registration - $399/day$119712
Printed Course Book (A PDF book is included in the course fee)$1001
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Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

Student from Vivado Boot Camp for the FPGA User Phase 3

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

Student from Designing with VDHL

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

All in all a great experience.

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

Student from Vivado Boot Camp for the FPGA User Phase 3

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

Student from Designing with VHDL

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

Scheduled Classes

View our Full Calendar for class date status.
(Confirmed, Closed, Full)

Training Duration:

3 Days

ATP 2022 Number 1

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Who should attend:

Embedded software developers interested in customizing the PetaLinux kernel on an ARM processor design for a Xilinx Zynq All Programmable SoC.

PETALINUX Skills Gained

After completing this comprehensive training, you will know how to:

  • Explain what an embedded Linux kernel is
  • Describe the Linux device driver architecture
  • Create a PetaLinux project to configure and build an image using PetaLinux tools
  • Create a working ARM Cortex-A9 or Cortex-A53 Processor Linux system using the Vivado® Design Suite and PetaLinux tools
  • List various hardware interfacing options available for the ARM Cortex-A9 and Cortex-A53 Processor
  • Build custom hardware cores and device drivers using the user space I/O (UIO) framework

Course Outline

Day 1Day 2Day 3
  • Understanding Petalinux installation and setup in various systems
  • Embedded Linux Overview
  • LAB: A First Look
    Log in to the ARM processor Linux system and make comparisons between the embedded Linux and desktop Linux environments.
  • Introduction to the PetaLinux Tools
  • LAB: Build and Boot an Image
    Explore the Linux configuration menus and build the ARM processor Linux kernel and applications. Download the resulting system image to the development board.
  • Application Development and Debugging
  • LAB: Application Development and Debugging
    Create a simple user application with PetaLinux Tools and debug the application with System Debugger.
  • Networking and TCP/IP
  • LAB: Networking and TCP/IP
    Explore the kernel configuration menu. Log in to the ARM processor Linux system by using telnet. Transfer files to and from Linux by using FTP. Build and experiment with web-based applications under Linux.
  • Device Drivers, User Space I/O, and Loadable Kernel Modules
  • LAB: Accessing Hardware Devices from User Space
    Access a hardware device directly from user space. Use the UIO framework to access a hardware device. Experience loading and unloading kernel modules.
  • Board Bring Up with the Vivado® Design Suite and PetaLinux Tools
  • LAB: Basic Hardware Design with the Vivado Design Suite and PetaLinux Tools
    Use the Vivado IP integrator (IPI) to create a basic hardware design with the ARM Cortex-A9 or ARM Cortex-A53 processor. Use PetaLinux Tools to create a new embedded Linux target for the hardware design.
  • Custom Hardware Development and Interfacing
  • LAB: Custom Hardware Development
    Design a customized IP core. Integrate the IP core with the AXI interface and debug.
  • Custom Driver Development
  • LAB: Custom Driver Development
    Write a UIO program to access the PWM AXI IP core. Boot from Flash and verify it on the target board.

Please note: The instructor may change the content order to provide a better learning experience.

Updated 10-10-22
©2022 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.