Check out the latest AMD classes on the BLT Training Calendar

We provide a range of courses including hands-on labs, interactive discussions & best practices to leverage your success. We offer online and in-person training, as well as private training. Our BLT training center is located in Columbia, MD. Class location is noted on the calendar.

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AMD Xilinx Authorized Training Provider

COURSE SCHEDULE

Note: Additional courses are available only as private classes. Please see the Course Index for the complete list.

COURSECLASS DATELOCATIONSTATUS
See All On-Demand WebinarsOn-DemandRecordedView
WEBINAR: Maximizing Your Debug with System ILAsJune 26, 2024 @ 2 PM ETOnlineWATCH
Designing FPGAs Using the Vivado Design Suite 3 - Timing Closure, CDC, and DebuggingNovember 12-14, 2024Live E-Learning9 seats left
Designing with the Zynq UltraScale+ RFSoCNovember 12-14, 2024Live E-Learning5 seats left
BLT Exclusive: Designing with VerilogNovember 19-21, 2024Live E-LearningClosed
WORKSHOP: Digital Logic 101November 20, 2024 @ 10 AM ETOnlineLIMITED SEATS
WEBINAR: Build Flow for KRIA SOMNovember 26, 2024 @ 2 PM ETOnlineLIMITED SEATS
Designing with VHDLDecember 3-5, 2024Live E-Learning8 seats left
Dynamic Function eXchange (DFX) Using the Vivado Design SuiteDecember 3-5, 2024Live E-LearningClosed
Designing FPGAs Using the Vivado Design Suite 4 – Timing Closure, Floorplanning, Debugging and TclDecember 10-12, 2024Live E-Learning9 seats left
WORKSHOP: From Theory to Practice: Applying Timing ConstraintsDecember 18, 2024 @ 10 AM ETOnlineLIMITED SEATS
WEBINAR: Understanding AXIDecember 19, 2024 @ 2 PM ETOnlineLIMITED SEATS
BLT Exclusive: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoCJanuary 21-23, 2025Live E-Learning8 seats left
WORKSHOP: Versal Adaptive SoCs Quick Start Workshop: A Guide to Integration and ImplementationJanuary 22, 2025 @ 10 AM ETOnlineLIMITED SEATS
Embedded Heterogeneous Design (For Getting Started with Versal Devices)January 28-30, 2025Live E-LearningConfirmed
WEBINAR: Optimizing FPGA Designs with Vivado Reports and Design Rule ChecksJanuary 29, 2025 @ 2 PM ETOnlineLIMITED SEATS
Ultrafast Design MethodologyFebruary 4-6, 2025Live E-LearningConfirmed
Designing with VHDLFebruary 11-13, 2025Live E-LearningConfirmed
Embedded Design with PetaLinux ToolsFebruary 11-13, 2025Live E-Learning9 seats left
Designing with VerilogFebruary 18-20, 2025Live E-LearningConfirmed
WORKSHOP: Vitis IDE Quick StartFebruary 19, 2025 @ 10 AM ETOnlineLIMITED SEATS
Designing FPGAs Using the Vivado Design Suite 1 - FPGA EssentialsMarch 4-6, 2025Live E-LearningConfirmed

High-Level Synthesis with the Vitis HLS Tool

March 11-13, 2025Live E-LearningConfirmed
Vitis Model Composer: A MATLAB and Simulink-based Product (DSP)March 18-20, 2025Live E-LearningConfirmed
Designing FPGAs Using the Vivado Design Suite 2– Clocking, IO, IP IntegratorMarch 25-27, 2025Live E-LearningConfirmed

BLT Exclusive: Designing and Verification with SystemVerilog

April 8-10, 2025Live E-LearningConfirmed
Designing FPGAs Using the Vivado Design Suite 3- Timing Closure, CDC, and DebuggingApril 29 - May 1, 2025Live E-LearningConfirmed
Designing with the Zynq UltraScale+ RFSoCMay 13-15, 2025Live E-LearningConfirmed

Design Closure Techniques

May 20-21, 2025Live E-LearningConfirmed
Designing FPGAs Using the Vivado Design Suite 4 – Timing Closure, Floorplanning, Debugging and TclJune 3-5, 2025Live E-LearningConfirmed
Operating Systems and Hypervisors in Adaptive SoCs (formerly called ACAPs)Contact usLive E-LearningContact us
DSP Design Using System GeneratorContact usLive E-LearningContact us

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

I have a great grasp of HLS and how to use Vitis effectively

I really enjoyed this class and feel like I have a great grasp of HLS and how to use Vitis effectively. Cole was a great instructor, and I
would easily take another class with him. Thank you very much for running this class!

– Student from High-Level Synthesis with the Vitis HLS Tool

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

Student from Designing with VHDL

One of the best experiences for AMD Xilinx training that I’ve had

Bill was a great instructor and answered all of our questions. He went above and beyond to make this course a great experience. If/When I use BLT for Xilinx training in the future I will be on the lookout to see if he’s leading the lecture. One of the best experiences for AMD Xilinx training that I’ve had.

– Student from Designing with VHDL

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

Student from Vivado Boot Camp for the FPGA User Phase 3

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

Student from Designing with VDHL

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

This one was definitely one of the best

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

Student from Vivado Boot Camp for the FPGA User Phase 3

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization