Public Schedule
Instructor-led Web Based Training
- November 5, 2020 - Vitis™ FastTrack: Session 1 - Essential Overview
- November 12, 2020 - Vitis™ FastTrack: Session 2 - AI
- November 19, 2020 - Vitis™ FastTrack: Session 3 - System Debug
- December 2, 2020 - Designing with VHDL
- December 9, 2020 - Embedded Systems Hardware Design Boot Camp
- January 12, 2021 - Vivado™ Boot Camp Phase-2: Implementing for Performance
- January 20, 2021 - Designing with the Zynq® UltraScale+™ RFSoC
- January 27, 2021 - Embedded Design with PetaLinux Tools
- February 2, 2021 - Designing with VHDL
- February 9, 2021 - Embedded Systems Hardware Design Boot Camp
- February 9, 2021 - Essential DSP Implementation Techniques for Xilinx FPGAs
- February 10, 2021 - DSP Design Using System Generator
- February 23, 2021 - Vivado™ Boot Camp Phase-1: Designing for Performance
- March 23, 2021 - Vivado™ Boot Camp Phase-2: Implementing for Performance
- April 7, 2021 - C-based Design: High-Level Synthesis with the Vivado™ HLx Tool
- April 7, 2021 - Designing with the Zynq® UltraScale+™ RFSoC
- April 20, 2021 - Vivado™ Boot Camp Phase-3: Achieving Performance
- April 20, 2021 - Designing with VHDL
Columbia, MD - BLT Training Center
Version: 2020-11-17_1035