Embedded Systems Design

Core modules from this course are available as part of our embedded boot camp: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

This course is available as private training only.

COURSE CODE: EMBD-HW

Learn general embedded concepts, tools, and techniques using the Vivado Design Suite and Vitis unified software platform.

The emphasis is on:

  • Designing, expanding, and modifying embedded systems utilizing the features and capabilities of the Zynq System on a Chip (SoC), Zynq UltraScale+™ MPSoC, Versal adaptive SoC, and MicroBlaze soft processor
  • Adding and simulating AXI-based peripherals using bus functional model (BFM) simulation

See Course Outline

3-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $600/day$180018
In-Person Public Registration - $600/day$180018
Printed Course Book (A PDF book is included in the course fee)$1001
Private TrainingLearn MoreLearn More
CoachingLearn MoreLearn More

Scheduled Classes

No Scheduled Sessions - Contact Us to ask about setting one up!

Training Duration:

3 Days

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

Student from Designing with VHDL

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

Student from Designing with VDHL

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

This one was definitely one of the best

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

Student from Vivado Boot Camp for the FPGA User Phase 3

The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

Student from Vivado Boot Camp for the FPGA User Phase 3

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

One of the best experiences for AMD Xilinx training that I’ve had

Bill was a great instructor and answered all of our questions. He went above and beyond to make this course a great experience. If/When I use BLT for Xilinx training in the future I will be on the lookout to see if he’s leading the lecture. One of the best experiences for AMD Xilinx training that I’ve had.

– Student from Designing with VHDL

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

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Who should attend:

Engineers who are interested in developing embedded systems with the Zynq SoC, Zynq UltraScale+ MPSoC, Versal adaptive SoC, and/or MicroBlaze soft processor core.

Software Tools

  • Vivado Design Suite
  • Vitis unified software platform

Hardware

  • Architectures: Zynq-7000 SoC (Cortex-A9 processor), Zynq UltraScale+ MPSoC (Cortex-A53 and Cortex-R5 processors), Versal adaptive SoC (Cortex-A72 and Cortex-R5F processors), and MicroBlaze processor
  • Demo board: Zynq UltraScale+ MPSoC ZCU104 or adaptive SoC VCK190 board

Skills Gained

After completing this comprehensive training, you will know how to:

  • Describe the various tools that encompass an AMD Xilinx embedded design
  • Rapidly architect an embedded system containing various processors using the Vivado IP integrator and Customization Wizard
  • Develop software applications utilizing the Vitis unified software platform
  • Create and integrate an IP-based processing system component in the Vivado Design Suite
  • Design and add a custom AXI interface-based peripheral to the embedded processing system
  • Simulate a custom AXI interface-based peripheral using verification IP (VIP)
  • Investigate issues using cross-triggering

Course Outline

Day 1Day 2Day 3
Embedded UltraFast Design Methodology
Outlines the different elements that comprise the Embedded Design Methodology. {Lecture, Demo}

Overview of Embedded Hardware Development
Overview of the embedded hardware development flow. {Lecture, Demo}

Driving the IP Integrator Tool
Describes how to access and effectively use the IPI tool. {Lecture, Lab}

Overview of Embedded Software Development
Reviews the process of building a user application. {Lecture}

Driving the Vitis Software Development Tool
Introduces the basic behaviors required to drive the Vitis tool to generate a debuggable C/C++ application. {Lecture, Lab}

AXI: Introduction
Introduces the AXI protocol. {Lecture}
AXI: Variations
Describes the differences and similarities among the three primary AXI variations. {Lecture}

AXI: Transactions Describes different types of AXI transactions. {Lecture, Demo, Lab}

Introduction to Interrupts

Introduces the concept of interrupts, basic terminology, and generic implementation. {Lecture}

Interrupts: Hardware Architecture and Support
Reviews the hardware that is typically available to help implement and manage interrupts. {Lecture}

AXI: Connecting AXI IP
Describes the relationships between different types of AXI interfaces and how they can be connected to form hierarchies. {Lecture, Demo}

Creating a New AXI IP with the Wizard
Explains how to use the Create and Import Wizard to create and package an AXI IP. {Lecture, Lab}

AXI: BFM Simulation Using Verification IP
Describes how to perform BFM simulation using the Verification IP. {Lecture, Lab}
MicroBlaze Processor Architecture Overview
Overview of the MicroBlaze microprocessor architecture. {Lecture, Lab}

MicroBlaze Processor Block Memory Usage
Highlights how block RAM can be used with the MicroBlaze processor. {Lecture}

Zynq-7000 SoC Architecture Overview
Overview of the Zynq-7000 SoC architecture. {Lecture, Demo, Lab}

Zynq UltraScale+ MPSoC Architecture Overview
Overview of the Zynq UltraScale+ MPSoC architecture. {Lecture, Demo, Lab}

Debugging Using Cross-Triggering
Illustrates how hardware-software cross-triggering techniques can uncover issues. {Lecture, Lab}

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

  • FPGA design experience
  • Completion of the Designing FPGAs Using the Vivado Design Suite 1 course or equivalent knowledge of the Vivado software implementation tools
  • Basic understanding of C programming
  • Basic understanding of microprocessors
  • Some HDL modeling experience

RELATED COURSES:

Updated 12-18-2023
©2023 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.