Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

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Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

COURSE CODE: BLT-EHWB

Our exclusive class thoroughly covers modules from these AMD courses:

This course is designed to bring FPGA designers up to speed developing embedded systems using the Vivado Design Suite. The features and capabilities of the Zynq UltraScale+ MPSoC and the Zynq-7000 SoC are covered in lectures, demonstrations and labs, along with general embedded concepts, tools and techniques. Additionally, advanced embedded topics included in this course cover the implementation of level 1 and level 2 device drivers, Asynchronous Multiprocessing (AMP), and the embedded operating system, PetaLinux. The hands-on labs utilizing actual ZCU104 Evaluation Boards (in-person only) provide students with experience designing, expanding and modifying an embedded system, including booting techniques and hardware-software co-debugging.

This is an advanced class. Those not meeting the prerequisites will struggle.

See Course Outline

3-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $600/day$180018
In-Person Public Registration - $600/day$180018
Private TrainingLearn MoreLearn More
CoachingLearn MoreLearn More
Printed Course Book (A PDF book is included in the course fee)
Cannot be purchased without registration.
$2002

Scheduled Classes

Live Online Training (Starts at 9am ET)
July 15-17, 2025 | Register Today
View our Full Calendar for class date status.
(Confirmed, Closed, Full)

Training Duration:

3 Days

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The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

– Student from Designing with VDHL

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

– Student from Designing with VHDL

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

I have a great grasp of HLS and how to use Vitis effectively

I really enjoyed this class and feel like I have a great grasp of HLS and how to use Vitis effectively. Cole was a great instructor, and I
would easily take another class with him. Thank you very much for running this class!

– Student from High-Level Synthesis with the Vitis HLS Tool

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

– Student from Vivado Boot Camp for the FPGA User Phase 3

They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

One of the best experiences for AMD Xilinx training that I’ve had

Bill was a great instructor and answered all of our questions. He went above and beyond to make this course a great experience. If/When I use BLT for Xilinx training in the future I will be on the lookout to see if he’s leading the lecture. One of the best experiences for AMD Xilinx training that I’ve had.

– Student from Designing with VHDL

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

– Student from Vivado Boot Camp for the FPGA User Phase 3

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

This one was definitely one of the best

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

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Who should attend:

Engineers who are interested in developing embedded systems with the Zynq UltraScale+ MPSoC and AMD Zynq-7000 SoC using Vivado Design Suite and Vitis.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Describe the various tools that encompass an AMD embedded design
  • Rapidly architect an embedded system containing an ARM based processor using the Vivado IP integrator and Customization Wizard
  • Utilizing Vitis for embedded software applications
  • Create and integrate an IP-based processing system component in the Vivado Design Suite
  • Design and add custom AXI interface-based peripherals to an embedded processing system
  • Simulate custom AXI interface-based peripherals using the AXI Verification IP

Course Outline

Day 1Day 2Day 3

Embedded UltraFast™ Design Methodology

  • Embedded UltraFast Design Methodology {Lecture}
  • Overview of Embedded Hardware Development {Lecture}

IP Integrator

  • Getting Started with Vivado IP Integrator {Lecture, Lab}
  • Designing IP Subsystems Using Vivado IP Integrator {Lecture, Lab}

Advanced eXtensible Interface (AXI)

  • AXI Introduction {Lecture}
  • AXI Variations {Lecture}
  • AXI Transactions {Lecture, Lab}
  • Creating a New AXI IP with the Wizard {Lecture, Lab}

Adaptive SoC’s

  • Zynq UltraScale+ MPSoC Architecture Overview {Lecture, Lab}
  • AMD Versal Adaptive SoC - Architecture Overview {Lecture, Lab}
  • AMD Versal Adaptive SoC - NoC Introduction and Concepts {Lecture}

Vitis

  • Driving the Vitis Software Development Tool {Lecture, Lab}

MPSoC Features

  • Zynq UltraScale+ MPSoC Clocking {Lecture}
  • Processing System - APU Overview {Lecture}
  • Zynq UltraScale+ MPSoC-RFSoC ARM Cortex-A53 Processor Support {Lecture}
  • Processing System - RPU Introduction {Lecture}
  • Zynq UltraScale+ MPSoC RPU TCM Architecture {Lecture}

Booting

  • QEMU Introduction {Lecture}
  • Zynq UltraScale+ MPSoC Boot and Configuration {Lecture}
  • Zynq UltraScale+ MPSoC Boot Image {Lecture, Lab}
  • FSBL Introduction {Demo}

Embedded Software

  • Interrupts Hardware Architecture and Support {Lecture}
  • Zynq UltraScale+ MPSoC Virtualization Hardware Support {Lecture}
  • Zynq UltraScale+ MPSoC PMU Introduction {Lecture}
  • Zynq UltraScale+ MPSoC PMU System Architecture {Lecture}

Debugging

  • AXI BFM Simulation Using Verification {Lecture, Lab}
  • Debug Flow in an IP Integrator Block Design {Lecture, Lab}
  • Debugging Using Cross-Triggering {Lecture, Lab}

Embedded Linux

  • Understanding Device Drivers {Lecture, Lab}
  • Introduction to Embedded Linux {Lecture}
  • Driving the PetaLinux Tool {Lecture}

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

  • Experience using the Vivado Design Suite
  • Experience using the C programming language
  • Experience using VHDL or Verilog
  • A basic understanding of microprocessors

RELATED COURSES:

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Updated 03-12-2025
©2025 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.

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