Designing with Versal™ AI Engine 1: Architecture and Design Flow
Designing with Versal AI Engine 1: Architecture and Design Flow
This course, Versal AI Engine 1, describes the Xilinx Versal™ AI Engine architecture, how to program the AI Engines (single kernel programming and multiple kernel programming using data flow graphs), the data communications between the PL and AI Engines, and how to utilize the AI Engine library for faster development.
The emphasis of this course is on illustrating the AI Engine architecture, designing single AI Engine kernels, designing multiple AI kernels using data flow graphs with the Vitis™ IDE, reviewing the data movement between AI Engines, between AI Engines via memory and DMA, and between AI Engines to programmable logic (PL), and analyzing and debugging kernel performance.
Click here for more information about the Xilinx Versal ACAP.
|2-Day Instructor-led Course||Price USD||Training Credits|
|Hosted Online - $299/day||$598||6|
|In-Person Registration - $399/day||$798||8|
|Printed Course Book (mailed to you)||$100||1|
|Private Training||Contact Us||Contact Us|
|Follow on Coaching||Contact Us||Contact Us|
Who should attend:
Software and hardware developers, system architects, and anyone who needs to accelerate their software applications using Xilinx devices.
After completing this comprehensive training, you will know how to:
- Describe the Versal™ ACAP architecture at a high level
- Describe the various engines in the Versal™ ACAP device and the motivation behind the AI Engine
- Also describe the architecture of the AI Engine
- Describe the memory access structure for the AI Engine
- Describe the full application acceleration flow with the Vitis™ tool
- Enumerate the toolchain for Versal™ AI Engine programming
- Explain what intrinsic functions are
- Program a single AI Engine Kernel
- Program multiple AI Engine kernels using static data flow (SDF) graphs
|Day 1||Day 2|
Please note: The instructor may change the content order to provide a better learning experience.
- Comfort with the C/C++ programming language
- Software development flow
- Vitis™ software for application acceleration development flow
- Designing with the Versal™ ACAP: Architecture and Methodology
- Designing with the Versal™ ACAP: Network on Chip
- Designing with Versal™ AI Engine 2: Graph Programming with AI Engine Kernels
- Designing with Versal™ AI Engine 3: Kernel Programming and Optimization
- Designing with the Versal ACAP: Power and Board Design