Embedded Heterogeneous Design
Embedded Heterogeneous Design
(For Getting Started with Versal Devices)
COURSE CODE: EMBD-HET
This course covers the AMD Versal™ architecture and illustrates the tool flow for developing HLS and AI Engine components as well as integrating an entire system project to design an embedded heterogeneous system using the v++ tools and AMD Vitis™ Unified IDE.
The emphasis of this course is on:
- Describing an embedded heterogeneous system design
- Illustrating the AMD Versal adaptive SoC architecture, NoC, and AI Engine
- Describing an AMD Versal design tool flow
- Developing HLS and AIE components using the AMD Vitis tool
- Utilizing the v++ command line tools for component compilation, linking, and packaging to run emulation
- Demonstrating the system design flow for a heterogeneous embedded system using the AMD Vitis Unified IDE
Scheduled Classes
Live Online Training (Starts at 9am ET)
Training Duration:
3 Days
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Who should attend:
Software and hardware developers, system architects, and anyone who needs to accelerate their software
applications using AMD devices.
Software Tools
- AMD Vitis Unified IDE 2023.2
Hardware
- Architecture: AMD Versal adaptive SoCs
Skills Gained
After completing this comprehensive training, you will have the necessary skills to:
- Identify the resources available in AMD adaptive SoC architectures
- Describe the processes for developing the components for each type of resource
- Describe the optimization and debug methodologies for each component
- Develop components and link and package a system design using the v++ tools
- Assemble a complete system and run hardware emulation using the AMD Vitis Unified IDE
Course Outline
Please note: The instructor may change the content order to provide a better learning experience.
Prerequisites:
- Comfort with the C/C++ programming language
- Software development flow
- AMD Vitis tool flow