Developing AI Inference Solutions with the Vitis AI Platform

COURSE CODE: AI-INFER

Implement neural networks on cloud and edge platforms using the Vitis AI development platform.

The emphasis of this course is on:

Illustrating the Vitis AI tool flow, including optimization and compilation
Exploring the architectural features of the Deep Learning Processor Unit (DPU)
Utilizing the Vitis AI Library to optimize pre-processing and post-processing functions
Creating a custom platform and application
Deploying a design

Learn more about the Vitis Unified Software Platform from AMD.

3-Day Instructor-led Course	Price USD	Training Credits
Hosted Online - $600/day	$1800	18
In-Person Public Registration - $600/day	$1800	18
Printed Course Book (A PDF book is included in the course fee) Cannot be purchased without registration.	$100	1
Private Training	Learn More	Learn More
Coaching	Learn More	Learn More

Scheduled Classes

No Scheduled Sessions - Contact Us to ask about setting one up!

View our Full Calendar for class date status.

(Confirmed, Closed, Full)

Training Duration:

3 Days

They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

– Student from Vivado Boot Camp for the FPGA User Phase 3

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

– Student from Designing with VHDL

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

– Student from Designing with VDHL

One of the best experiences for AMD Xilinx training that I’ve had

Bill was a great instructor and answered all of our questions. He went above and beyond to make this course a great experience. If/When I use BLT for Xilinx training in the future I will be on the lookout to see if he’s leading the lecture. One of the best experiences for AMD Xilinx training that I’ve had.

– Student from Designing with VHDL

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

This one was definitely one of the best

– Student from Vivado Boot Camp for the FPGA User Phase 1

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

– Student from Vivado Boot Camp for the FPGA User Phase 3

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

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Who should attend:

Software and hardware developers, AI/ML engineers, data scientists, and anyone who needs to accelerate their software applications using AMD devices.

Software Tools

Vitis AI development environment 3.5
Vivado Design Suite

Hardware (Optional)

Alveo accelerator cards and adaptive SoCs
Zynq UltraScale+ MPSoC ZCU104 board

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:

Describe machine learning solutions from the perspective of the Vitis AI development tools
Enumerate the supported frameworks and models for cloud and edge applications
Implement neural networks on cloud and edge platforms using the Vitis AI development platform
Describe the proper Vitis AI tool flow
Optimize a DPU for edge applications, leveraging the device architecture
Enumerate the APIs included with the AMD AI Library
Create a custom hardware overlay based on application requirements
Create a custom application using a custom hardware overlay and deploy the design

Course Outline

Day 1	Day 2	Day 3
Vitis AI Environment Overview Introduction to the Vitis AI Development Environment Describes the Vitis AI development environment, which consists of the Vitis AI development kit, for AI inference on AMD adaptive computing hardware platforms, including both edge devices and Alveo accelerator cards. {Lecture} Frameworks Supported by the Vitis AI Development Environment Discusses the support for many common machine learning frameworks, including TensorFlow and PyTorch. {Lecture} ML Concepts Overview of ML Concepts Overview of ML concepts such as DNN algorithms, models, inference and training, and frameworks. {Lecture} Vitis AI Environment Toolchain AI Optimizer Describes the optimization of a trained model that can prune a model up to 90%. This topic is for advanced users and will be covered in detail in the Advanced ML training course. {Lecture} AI Quantizer and AI Compiler Describes the AI quantizer, which supports model quantization, calibration, and fine tuning. Also describes the AI compiler tool flow. With these tools, deep learning algorithms can deploy in the Deep Learning Processor Unit (DPU), which is an efficient hardware platform running on an AMD FPGA or SoC. {Lecture, Lab}	Profiler AI Profiler Describes the AI profiler, which provides layer-by-layer analysis to help with bottlenecks. Also covers debugging the DPU running result. {Lecture} Deep Learning Processor Unit (DPU) Introduction to the Deep Learning Processor Unit (DPU) Describes the Deep Learning Processor Unit (DPU) and its variants for edge and cloud applications. {Lecture} DPUCZDX8G ArchitectureOverview Overview of the DPUCZDX8G architecture, supported CNN operations, DPU data flow, and design considerations. {Lecture} AI Libraries Vitis AI Library Reviews the Vitis AI Library, which is a set of high-level libraries and APIs built for efficient AI inference with the DPU. It provides an easy-to-use and unified interface for encapsulating many efficient and high-quality neural networks. {Lecture, Lab}	Custom Hardware and Application Development DPU Edge Hardware Platform Creation Using the Vivado Design Suite Illustrates the steps to build a Vivado Design Suite project, add the DPUCZDX8G IP, and run the design on a target board. {Lab} DPU Edge Kernel Creation Using the Vitis Environment Flow Illustrates the steps to build a Vitis unified software platform project that adds the DPU as the kernel (hardware accelerator) and to run the design on a target board. {Lab} Creating a Vitis Embedded Acceleration Platform (Edge) Describes the Vitis embedded acceleration platform, which provides product developers an environment for creating embedded software and accelerated applications on heterogeneous platforms based on FPGAs, Zynq SoCs, and Alveo data center cards. {Lecture} Custom Edge DPU Application Creation Illustrates the steps to create a custom application, including building the hardware and Linux image, optimizing the trained model, and using the optimized model to accelerate a design. {Lab}

Day 1

Day 2

Day 3

Vitis AI Environment Overview

Introduction to the Vitis AI Development Environment
Describes the Vitis AI development environment, which consists of the Vitis AI development kit, for AI inference on AMD adaptive computing hardware platforms, including both edge devices and Alveo accelerator cards. {Lecture}
Frameworks Supported by the Vitis AI Development Environment
Discusses the support for many common machine learning frameworks, including TensorFlow and PyTorch. {Lecture}

ML Concepts

Overview of ML Concepts
Overview of ML concepts such as DNN algorithms, models, inference and training, and frameworks. {Lecture}

Vitis AI Environment Toolchain

AI Optimizer
Describes the optimization of a trained model that can prune a model up to 90%. This topic is for advanced users and will be covered in detail in the Advanced ML training course. {Lecture}
AI Quantizer and AI Compiler
Describes the AI quantizer, which supports model quantization, calibration, and fine tuning. Also describes the AI compiler tool flow. With these tools, deep learning algorithms can deploy in the Deep Learning Processor Unit (DPU), which is an efficient hardware platform running on an AMD FPGA or SoC. {Lecture, Lab}

Profiler

AI Profiler
Describes the AI profiler, which provides layer-by-layer analysis to help with bottlenecks. Also covers debugging the DPU running result. {Lecture}

Deep Learning Processor Unit (DPU)

Introduction to the Deep Learning Processor Unit (DPU)
Describes the Deep Learning Processor Unit (DPU) and its variants for edge and cloud applications. {Lecture}
DPUCZDX8G ArchitectureOverview
Overview of the DPUCZDX8G architecture, supported CNN operations, DPU data flow, and design considerations. {Lecture}

AI Libraries

Vitis AI Library
Reviews the Vitis AI Library, which is a set of high-level libraries and APIs built for efficient AI inference with the DPU. It provides an easy-to-use and unified interface for encapsulating many efficient and high-quality neural networks. {Lecture, Lab}

Custom Hardware and Application Development

DPU Edge Hardware Platform Creation Using the Vivado Design Suite
Illustrates the steps to build a Vivado Design Suite project, add the DPUCZDX8G IP, and run the design on a target board. {Lab}
DPU Edge Kernel Creation Using the Vitis Environment Flow
Illustrates the steps to build a Vitis unified software platform project that adds the DPU as the kernel (hardware accelerator) and to run the design on a target board. {Lab}
Creating a Vitis Embedded Acceleration Platform (Edge)
Describes the Vitis embedded acceleration platform, which provides product developers an environment for creating embedded software and accelerated applications on heterogeneous platforms based on FPGAs, Zynq SoCs, and Alveo data center cards. {Lecture}
Custom Edge DPU Application Creation
Illustrates the steps to create a custom application, including building the hardware and Linux image, optimizing the trained model, and using the optimized model to accelerate a design. {Lab}

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

Basic knowledge of machine learning concepts
Neural Networks Explained - Machine Learning Tutorial for Beginners: watch
How Convolutional Neural Networks Work: watch
Deep learning frameworks (TensorFlow and PyTorch)
Comfort with the C/C++/Python/make programming languages
Software development flow

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Updated 12-18-2023

©2023 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.

Developing AI Inference Solutions with the Vitis AI Platform