Designing with the AMD Embedded Development Framework (EDF) / Embedded Design with PetaLinux Tools

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Designing with the AMD Embedded Development Framework (EDF) / Embedded Design with PetaLinux Tools

COURSE CODE: EMBD EDF

EDF is the new AMD successor for PetaLinux.

This course introduces the AMD Embedded Development Framework (EDF), a unified software framework for AMD adaptive SoC and FPGA platforms. The EDF provides a structured development methodology, pre-built software stacks, and integrated tools to accelerate Linux-based embedded system development. Included in the class are core modules from the Petalinux class.

The emphasis of this course is on:

  • Understanding the supported and recommended development flows for hardware and embedded software
  • Identifying different design entry points and mapping role-based development within the EDF workflows
  • Simplifying platform-level development by using pre-built embedded software stacks, pre-configured board support packages (BSPs), and open-source tools
  • Leveraging the Software Hardware Exchange Loop (SHEL) flow and using tools like SDTGen, Lopper, and gen-machine-conf for hardware software integration
  • Exploring the migration guide to use the EDF instead of PetaLinux
  • Using open-source embedded Linux components
  • Creating and debugging an application
  • Building the environment and booting the system using the Arm processors available in AMD SoCs
  • Configuring the Linux environment and network components
  • Developing custom hardware and custom drivers

The primary focus is to gain hands-on experience with the EDF tools and workflows and learn how the EDF enables rapid prototyping and production-ready solutions through pre-built images.

This course focuses on the Zynq UltraScale+ MPSoC and Versal adaptive SoC architectures.

See Course Outline

3-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $600/day$180018
In-Person Public Registration - $600/day$180018
Private TrainingLearn MoreLearn More
CoachingLearn MoreLearn More
Printed Course Book (A PDF book is included in the course fee)
Cannot be purchased without registration.
$2002

Scheduled Classes

Live Online Training (Starts at 9am ET)
July 21-23, 2026 | Register Today
Training Duration:

3 Days

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My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

– Student from Vivado Boot Camp for the FPGA User Phase 3

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

– Student from Designing with VDHL

One of the best experiences for AMD Xilinx training that I’ve had

Bill was a great instructor and answered all of our questions. He went above and beyond to make this course a great experience. If/When I use BLT for Xilinx training in the future I will be on the lookout to see if he’s leading the lecture. One of the best experiences for AMD Xilinx training that I’ve had.

– Student from Designing with VHDL

This one was definitely one of the best

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

– Student from Designing with VHDL

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

– Student from Vivado Boot Camp for the FPGA User Phase 3

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

I have a great grasp of HLS and how to use Vitis effectively

I really enjoyed this class and feel like I have a great grasp of HLS and how to use Vitis effectively. Cole was a great instructor, and I
would easily take another class with him. Thank you very much for running this class!

– Student from High-Level Synthesis with the Vitis HLS Tool

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Who should attend:

Embedded software developers and system designers working on AMD adaptive SoC or FPGA platforms who want to build Linux-based systems using the AMD Embedded Development Framework. Developers looking to migrate from Petalinux to EDF.

Software Tools

  • Yocto project
  • Vivado Design Suite
  • Vitis Unified IDE
  • Hardware emulation environment:
  • VirtualBox
  • QEMU
  • Ubuntu desktop

Hardware

  • Zynq UltraScale+ MPSoC ZCU104 board
  • Versal AI Core Series VCK190 board
  • Versal AI Edge Series VEK280 board

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:

  • Build and customize Linux-based platforms using the AMD Embedded Development Framework (EDF)
  • Develop and deploy applications using the EDF-provided SDKs, pre-built images, and workflows
  • Migrate existing PetaLinux-based projects to the AMD Embedded Development Framework

Course Outline

Day 1Day 2Day 3
Overview of the Embedded Development Framework
Provides an overview of the AMD EDF and its role in embedded platform development. {Lecture}

EDF Software Stack and Role-Based Development Flow
Introduces the software stack, including Linux BSPs, pre-built disk images, tools, firmware, utilities, and reference designs and explains role-based development flows. {Lecture}

Application Development and Deployment Using the EDF
Introduces software and hardware application development flows and their deployment using the EDF Yocto workflows. {Lecture}

Linux OS Integration and Yocto Customization
Covers building and customizing the Linux OS using the Yocto Project for AMD SoCs. {Lecture, Lab}

Introduction to the Software Hardware Exchange Loop (SHEL) Flow
Outlines the Software Hardware Exchange Loop (SHEL) flow as part of the EDF and reviews the key tools used in the flow, such as SDTGen, Lopper, and gen-machine-conf. {Lecture, Lab}

Custom Hardware Development Using the EDF
Covers custom hardware workflows, including Segmented Configuration and dynamic PL reload. {Lecture, Lab}

Migration from PetaLinux to the Embedded Development Framework
Explains the migration from PetaLinux to the Yocto-based EDF flow and the mapping of common build and customization tasks. {Lecture}		Introduction to Embedded Linux
Introduces embedded Linux, including a brief architectural overview, as well as some of the reasons for its rising popularity as an embedded OS. Also introduces the concept of toolchains
and cross-compilation. {Lecture}

Embedded Linux Components
Describes the various components required for embedded Linux platforms (including the kernel image, root file system, and boot loaders) and how the components affect the booting of Linux on
these platforms. {Lecture, Lab}

Yocto Project Overview
Introduces the Yocto Project, which encompasses a build system designed for embedded Linux. {Lecture}

PetaLinux Tool Design Flow
Provides a brief description of the PetaLinux tool design flow and describes in detail various PetaLinux commands (including petalinux-create, petalinux-config, petalinux-build, petalinuxpackage, and petalinux-boot) and their example use cases. {Lecture}

PetaLinux Application Development
Introduces core concepts for developing, customizing, and running software applications in an embedded Linux environment. {Lecture, Lab}

Customizing the Root File System
Provides a brief description on customizing the rootfs for embedded Linux components such as libraries, applications, modules, layers, recipes, and packages. {Lecture}		Networking and TCP/IP
Discusses how the TCP/IP networking stack can be used to improve productivity during embedded product development by supporting network data communication, network control/status management, and firmware and hardware upgrades. {Lecture, Lab}

Basic Hardware Design Process with the Vivado Design Suite
Describes the complete board bring-up process, which includes the hardware design as well as Linux image creation for the hardware. {Lecture, Lab}

Linux Device Drivers Overview
Provides a brief overview on Linux device drivers and their requirements. Also describes what a device tree is and how it is generated. {Lecture}

User Space I/O and Loadable Kernel Modules
Introduces two lightweight approaches for accessing the physical memory of devices from user space: direct access through the dev/mem virtual device and the user space I/O framework. Also
covers the role and usage loadable kernel modules. {Lecture, Lab}

Custom Hardware Development
Describes the Create and Package IP Wizard and how it can be used to create a variety of architectural options for interfacing a system with custom processing hardware. {Lecture, Lab}

Custom Driver Development
Discusses device driver options to match custom hardware devices and how to use the provided interfaces to read and writeto the devices. {Lecture, Lab}

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

  • Basic understanding of embedded systems and Linux-based development
  • Familiarity with Yocto Project® concepts and workflows
  • Awareness of hardware/software integration concepts in the AMD ecosystem
  • Familiarity with AMD SoCs and evaluation boards is a plus

RELATED COURSES:

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Updated 04-15-26
©2026 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.

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