Developing Multimedia Solutions Using a Hardened VCU/VDU
Developing Multimedia Solutions Using a Hardened VCU/VDU
COURSE CODE: EMBD-MMEDIA
Learn how to build and run complex multimedia applications targeting AMD Zynq™ UltraScale+™ MPSoC EV, Versal™ AI Core, or Versal AI Edge devices with the help of the open-source GStreamer framework.
The course also illustrates how the use of the hardened video codec unit (VCU) in the EV device and the hardened video decode unit (VDU) in the AI Core/AI Edge devices helps to achieve optimum performance by offloading intensive video processing tasks to dedicated hardware accelerators.
The emphasis of this course is on:
- Describing the multimedia solutions provided by AMD
- Utilizing the multimedia blocks available in Zynq UltraScale+ MPSoC and Versal adaptive SoC devices
- Explaining the encoder and decoder functionalities
- Describing the different audio, video, connectivity, and processing soft IPs provided by AMD
- Describing the VCU/VDU software stack
- Describing the different multimedia-supported frameworks
- Utilizing GStreamer plugins to create video pipelines
- Performing video encoding and decoding using the video codec unit (VCU) in Zynq UltraScale+ MPSoC EV devices
- Performing video decoding using the video decoder unit (VDU) in Versal AI Core/Edge devices
| 2-Day Instructor-led Course | Price USD | Training Credits |
|---|---|---|
| Hosted Online - $600/day | $1200 | 12 |
| In-Person Public Registration - $600/day | $1200 | 12 |
| Private Training | Learn More | Learn More |
| Coaching | Learn More | Learn More |
| Printed Course Book (A PDF book is included in the course fee) | $200 | 2 |
Scheduled Classes
No Scheduled Sessions - Contact Us to ask about setting one up!
2 Days
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Who should attend:
Anyone who needs to develop multimedia application targeting Zynq UltraScale+ MPSoC EV, Versal AI Core, or Versal AI Edge devices.
Software Tools
- Vivado™ Design Suite
- Vitis Unified IDE
- Petalinux / Yocto
Hardware
- Zynq UltraScale+ MPSoC ZCU104 board*
- Versal adaptive SoC VEK280 (Versal AI Edge Series) board*
- HDMI-supported display device (monitor)
- Source (Nvidia Shield or ABOX)
- Two HDMI™ cables and one Ethernet cable
Skills Gained
After completing this comprehensive training, you will have the necessary skills to:
- Describe the multimedia solutions provided by AMD
- Utilize the multimedia blocks available in AMD Zynq UltraScale+ MPSoC and Versal adaptive SoC devices
- Explain the encoder and decoder functionalities
- Describe the different audio, video, connectivity, and processing soft IPs provided by AMD
- Describe the VCU/VDU software stack
- Describe the different multimedia-supported frameworks
- Utilize GStreamer plugins to create video pipelines
- Perform video encoding and decoding using the video codec unit (VCU) in Zynq UltraScale+ MPSoC EV devices
- Perform video decoding using the video decoder unit (VDU) in Versal adaptive SoC AI Core/Edge devices
Course Outline
| Day 1 | Day 2 |
|---|---|
| Multimedia Overview Provides an overview of multimedia components and major trends. Also describes why AMD is focused on multimedia. {Lecture} Multimedia Solutions Provides a top-level introduction of the different multimedia solutions from AMD, including hardened multimedia blocks, the software stack, soft IPs, and tools. {Lecture} Zynq UltraScale+ MPSoC: Multimedia Blocks Reviews the different multimedia blocks available in Zynq UltraScale+ MPSoC EV devices, including the dedicated video codec units, graphics processors, DisplayPort controllers, and DDR controllers. {Lecture} Introduction to Video Codec Units (VCU) Describes the basics of a video codec unit, including why a video code is needed, what it does, and its basic components. {Lecture} Zynq UltraScale+ MPSoC: VCU Architecture Covers the video pipeline and reviews the Zynq UltraScale+ MPSoC EV VCU encoder and decoder architecture in detail. {Lecture} Versal Adaptive SoC: Multimedia Blocks Outlines the basics of the Versal device architecture and portfolio and reviews the Versal AI Edge and AI Core video decode unit architecture in detail. {Lecture, Lab} Multimedia: Connectivity and Processing IPs Reviews the different input and output subsystems that are used to capture and display audio and video data. The corresponding connectivity and processing IPs provided by AMD are also covered. {Lecture} VCU: Supported Standards, Latency, and Performance Discusses the VCU-supported coding standards and provides more information on VCU latency and performance. The different profiles of the H.264/AVC standard is covered in detail, and different low-latency modes are reviewed. {Lecture} | Introduction to the GStreamer Framework Describes the GStreamer framework and its basic building blocks. Also describes the advantages of using GStreamer for multimedia application development and how GStreamer interacts with an application. {Lecture, Lab} Software Stack Describes the VCU/VDU software stack provided by AMD, including the control software, OpenMAX™ and GStreamer layers. Control software is provided for those with their own custom frameworks and logic. {Lecture} Multimedia-supported Frameworks in Linux: V4L2, DRM, KMS, ALSA Covers the multimedia frameworks supported in Linux (such as V4L2, DRM, KMS and ALSA) and how they are implemented in a video pipeline. The concept of buffer sharing is also discussed. {Lecture, Lab} Audio and Graphics Solutions Provides an overview of the features of the AMD audio solutions. Also describes the GPU architecture and functionality of the GPU software stack. {Lecture} Streaming Pipeline Using GStreamer Describes in detail the streaming pipeline application flow using GStreamer, including how to build a GStreamer application. {Lecture, Labs} |
Please note: The instructor may change the content order to provide a better learning experience.
Prerequisites:
- Basic knowledge of video technology
- Basic knowledge of a generic video codec unit (VCU)
- Intermediate level of knowledge of the Zynq UltraScale+ MPSoC architecture
- Basic knowledge of the Versal adaptive SoC architecture