Migration from Intel to AMD x86 Embedded Solutions -1

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Migration from Intel to AMD x86 Embedded Solutions -1

COURSE CODE: EMBD-MGRT-X861

This course provides a structured approach to migrating from Intel® to AMD x86 architectures in embedded and high-performance computing environments. Participants will explore AMD Zen 5 microarchitecture innovations, compare Intel and AMD platforms across instruction sets, thermal design, memory subsystems, firmware, and platform security. The course emphasizes migration strategies, performance tuning, and tool transitions to ensure a smooth and optimized Intel-to-AMD migration path.

The emphasis of this course is on:

  • Understanding AMD Zen 5 and comparing it with Intel processors in embedded markets
  • Mapping Intel instruction sets, memory, and firmware to AMD equivalents
  • Redesigning thermal systems for AMD migration
  • Ensuring robust signal integrity and system reliability in migration scenarios
  • Exploring AMD firmware and the boot flow as well as platform security technologies
  • Migrating workloads from Intel MKL to AMD AOCL and profiling workflows from Intel VTune to AMD uProf

See Course Outline

2-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $600/day$120012
In-Person Public Registration - $600/day$120012
Private TrainingLearn MoreLearn More
CoachingLearn MoreLearn More
Printed Course Book (A PDF book is included in the course fee)$2002

Scheduled Classes

No Scheduled Sessions - Contact Us to ask about setting one up!

Training Duration:

2 Days

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Expert tidbits

I liked the expert tidbits my instructor threw in to keep in mind when working on projects in the future regarding best practices. I also appreciated the questions the more experienced students asked, and how he was knowledgeable in order to address them.

– Student from Designing with VHDL

College course fit into 3 days

The instructor certainly knew the material and could explain the concepts as well as answer questions. Even the instructor said that this is a college course fit into 3 days.

– Student from Designing with VDHL

One of the best experiences for AMD Xilinx training that I’ve had

Bill was a great instructor and answered all of our questions. He went above and beyond to make this course a great experience. If/When I use BLT for Xilinx training in the future I will be on the lookout to see if he’s leading the lecture. One of the best experiences for AMD Xilinx training that I’ve had.

– Student from Designing with VHDL

Elie was an exceptional instructor

Elie was an exceptional instructor, and I would welcome the opportunity to take another class from him and BLT in the future.

– Student from Designing with Verilog

I would endorse him to teach a friend

Cole was a fantastic instructor and was very proactive in answering any questions that came up. I would endorse him to teach if a friend had to learn from this course.

– Student from Designing with Verilog

My instructor was very professional

My instructor was very professional and answered all of my questions thoroughly. I enjoyed hearing about his professional experience with certain aspects of the course / labs as we went through the course.

– Student from Vivado Boot Camp for the FPGA User Phase 1

A lot of insights beyond the course

Glenn was a great instructor and provided us with a lot of insights beyond the course material

– Student from Embedded Design with PetaLinux Tools

The instructor was excellent

The instructor for this class, Glenn, was excellent. He presented the material with great examples and encouraged students to ask questions at any point in the course. Whenever there was a question he could not answer, he mentioned that he would bring it to his colleagues for answers, and after we came back from lunch, he had the answer.

– Student from Embedded Design with PetaLinux Tools

Impressed with the effort

Glenn is a good instructor – I’m impressed with the effort he put into the presentation.
I hope I didn’t annoy him with too many questions.

– Student from Designing with Versal AI Engine 3: Kernel Programming and Optimization

Knowledgeable instructor

Elie was a knowledgeable instructor, and did a really good job of making sure students were comfortable interrupting for questions. He answered questions well and communicated very clearly.

– Student from Designing with VHDL

Thanks for a great class!

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

I gained a lot of information

The class was pretty great and I gained a lot of information from it that I will certainly be applying at my job going forward!!

– Student from Vivado Boot Camp for the FPGA User Phase 1

My instructor was very capable

My instructor was very capable of answering any of my questions even when they were an extension of the material being presented. If he wasn’t sure of an answer, he made sure to verify his thoughts before answering my question

– Student from Vivado Boot Camp for the FPGA User Phase 1

I had a wonderful instructor

I had a wonderful instructor. His pacing throughout the course was good and made sure to allow for student questions and have conversations about related topics and experiences. I think the atmosphere was great for everyone to both learn and to share experiences, tips, and tricks about using the tool and the features discussed throughout the course.

– Student from Vivado Boot Camp for the FPGA User Phase 3

I have a great grasp of HLS and how to use Vitis effectively

I really enjoyed this class and feel like I have a great grasp of HLS and how to use Vitis effectively. Cole was a great instructor, and I
would easily take another class with him. Thank you very much for running this class!

– Student from High-Level Synthesis with the Vitis HLS Tool

Erich was engaging

Erich was engaging and had good pacing during the course. Although the course was all day for 3 days I didn’t feel exhausted at the end of sessions.

– Student from Vivado Boot Camp for the FPGA User Phase 1

This one was definitely one of the best

I have attended a bunch of training courses over the years. This one was definitely one of the best I have attended. Erich did a great job, and the material is very well done. Thanks for a great class!

– Student from Vivado Boot Camp for the FPGA User Phase 1

My instructor took time

My instructor took time during some of the breaks to look up and distribute information about questions that he didn’t happen to know direct answers to, and I always appreciate when instructors take the time to do that.

– Student from Vivado Boot Camp for the FPGA User Phase 3

They had answers for just about every question

Erich and Nathaniel were great, they had answers for just about every question/issue and linked relevant Xilinx/Vivado user manuals for further explanation/documentation.

– Student from Vivado Boot Camp for the FPGA User Phase 2

All in all a great experience

Tom was a great instructor, very knowledgeable and polite throughout the course. All in all a great experience.

– Student from Vivado Boot Camp for the FPGA User Phase 2

Can quickly and concisely answer technical questions

I really like the expertise of the presenters and that they can quickly and concisely answer technical questions, Tom did great!

– Student from Vivado Boot Camp for the FPGA User Phase 3

Labs were great

The labs were great and really reinforced the topics.

– Student from Designing with Versal AI Engine 1: Architecture and Design Flow

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Who should attend:

Embedded software developers and system architects as well as hardware designers and board engineers working on x86 platforms.

Software Tools

  • AMD AOCL
  • AMD uProf

Hardware

  • Architecture: Zen
  • Demo board: Lilac board

Skills Gained

After completing this comprehensive training, you will have the necessary skills to: 

  • Evaluate AMD Zen 5 performance enhancements and compare with Intel architectures
  • Map and migrate Intel instruction sets to AMD equivalents for embedded deployments
  • Redesign thermal systems for AMD platforms
  • Ensure signal integrity during Intel-to-AMD migration scenarios
  • Apply memory initialization and training flows with the AGESA™ firmware
  • Replace Intel FSP with AMD AGESA firmware and debug configurations
  • Implement platform security migration strategies with AMD SME, SEV, and SEV-SNP technologies
  • Transition from Intel MKL to AOCL libraries and validate workloads
  • Optimize performance profiling using AMD uProf instead of Intel VTune

Course Outline

Day 1Day 2
AMD Zen 5 Microarchitecture and Competitive Comparison
Discusses AMD Zen 5 enhancements for performance gains and compares AMD embedded portfolios to Intel. {Lecture}

Instruction Sets for x86 Embedded Architectures
Describes key x86 extensions, identifies tuning strategies and compatibility checks, and covers Intel-to-AMD migration plans. {Lecture}

Transitioning Thermal Designs
Reviews processor packaging and thermal parameters, outlines redesign strategies, and differentiates between AMD and Intel thermal tools. {Lecture}

Signal Integrity in Embedded x86
Describes signal integrity principles and applies them to Intel-to-AMD migration scenarios. {Lecture}

Memory Interface Transition
Explores AMD vs. Intel memory differences, outlines initialization/training with AGESA firmware, and discusses validation/debug methodologies. {Lecture}		AMD Firmware Stack Overview
Defines the concept of firmware and the boot process, maps Intel-to-AMD workflows, and describes UDK AGESA components. {Lecture}

Platform Security Migration
Explains platform security concepts, describes AMD SME, SEV, SEV-SNP technologies, and highlights migration strategies. {Lecture}

Optimizing x86 Embedded: Migrating from Intel MKL to AMD AOCL
Identifies AOCL equivalents to Intel libraries and describes how to validate performance and migrate/tune workloads for AMD platforms. {Lecture, Lab}

Optimizing Performance on AMD Platforms: Migrating from Intel VTune to AMD uProf
Compares AMD uProf vs. Intel VTune and discusses profiling on AMD CPUs/GPUs and how to optimize AOCL-based workloads as well as apply structured migration workflows. {Lecture, Lab}

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

  • Basic knowledge of x86 architecture and Intel/AMD processor families
  • Familiarity with thermal design, power delivery, and memory subsystem principles
  • Experience with firmware development and profiling tools

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Updated 08-29-2025
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