Zynq UltraScale+ MPSoC for the System Architect

Home > Xilinx Training Courses > System Courses > Zynq UltraScale+ MPSoC for the System Architect

Zynq UltraScale+ MPSoC for the System Architect

This two-day course is structured to provide system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family.

See Course Outline

2-Day Instructor-led CoursePrice USDTraining Credits
Hosted Online - $299/day$5986
In-Person Registration - $399/day$7988
Printed Course Book (mailed to you)$1001
Private TrainingContact UsContact Us
Follow on CoachingContact UsContact Us

Scheduled Classes

No Scheduled Sessions - Contact Us to ask about setting one up!

Training Duration:

2 Days

REGISTER

We update our schedule regularly. Stay informed.

NEWSLETTER SIGNUP

Who should attend:

System architects interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC device.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
  • Identify mechanisms to secure and safely run the system
  • Outline the high-level architecture of the devices
  • Define the boot sequences appropriate to the needs of the system

Course Outline

Day 1Day 2
Zynq UltraScale+ MPSoC Overview
Overview of the Zynq UltraScale+ MPSoC device.

Zynq UltraScale+ MPSoC HW-SW Virtualization
Covers the hardware and software elements of virtualization. The lab demonstrate how hypervisors can be used.

QEMU
Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.

Zynq UltraScale+ MPSoC Security and Software
Defines what safety and security is in the context of embedded systems and introduces several standards.		Zynq UltraScale+ MPSoC Power Management
Overview of the PMU and the power-saving features of the device.

Zynq UltraScale+ MPSoC System Coherency
Learn how information is synchronized within the API and through the ACE/AXI ports.

Zynq UltraScale+ MPSoC DDR and QoS
Understand how DDR can be configured to provide the best performance for your system.

Zynq UltraScale+ MPSoC Booting
How to implement the embedded system, including the boot process and boot image creation.

Zynq UltraScale+ MPSoC Ecosystem Support
Overview of supported operating systems, software stacks, hypervisors, etc.

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

  • Suggested: Understanding of the Zynq-7000 architecture
  • Familiarity with embedded operating systems

RELATED COURSES:

REGISTER
Updated 12-08-2021

©2022 Bottom Line Technologies, Inc. All Rights Reserved.

©2022 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, Kintex, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries.

∧