Zynq UltraScale+ MPSoC for the System Architect

BLT offers a similar course under a different name: Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

This two-day course is structured to provide system architects with an overview of the capabilities and support for the Zynq^® UltraScale+^™ MPSoC family.

See Course Outline

2-Day Instructor-led Course	Price USD	Training Credits
Hosted Online - $299/day	$598	6
In-Person Registration - $399/day	$798	8
Printed Course Book (A PDF book is included in the course fee)	$100	1
Private Training	Contact Us	Contact Us
Follow on Coaching	Contact Us	Contact Us

Scheduled Classes

No Scheduled Sessions - Contact Us to ask about setting one up!

See available class dates for Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

Training Duration:

2 Days

The BLT Adaptive Computing Summit

Emerging Solutions for Outer Space, Undersea, and Everywhere in Between

April 25: Columbia, MD • May 2: Melbourne, FL • May 4: Orlando, FL • May 17: Huntsville, AL

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Who should attend:

System architects interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC device.

Skills Gained

After completing this comprehensive training, you will know how to:

Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
Identify mechanisms to secure and safely run the system
Outline the high-level architecture of the devices
Define the boot sequences appropriate to the needs of the system

Course Outline

Day 1	Day 2
Zynq UltraScale+ MPSoC Overview Overview of the Zynq UltraScale+ MPSoC device. Zynq UltraScale+ MPSoC HW-SW Virtualization Covers the hardware and software elements of virtualization. The lab demonstrate how hypervisors can be used. QEMU Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available. Zynq UltraScale+ MPSoC Security and Software Defines what safety and security is in the context of embedded systems and introduces several standards.	Zynq UltraScale+ MPSoC Power Management Overview of the PMU and the power-saving features of the device. Zynq UltraScale+ MPSoC System Coherency Learn how information is synchronized within the API and through the ACE/AXI ports. Zynq UltraScale+ MPSoC DDR and QoS Understand how DDR can be configured to provide the best performance for your system. Zynq UltraScale+ MPSoC Booting How to implement the embedded system, including the boot process and boot image creation. Zynq UltraScale+ MPSoC Ecosystem Support Overview of supported operating systems, software stacks, hypervisors, etc.

Day 1

Day 2

Zynq UltraScale+ MPSoC Overview
Overview of the Zynq UltraScale+ MPSoC device.

Zynq UltraScale+ MPSoC HW-SW Virtualization
Covers the hardware and software elements of virtualization. The lab demonstrate how hypervisors can be used.

QEMU
Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.

Zynq UltraScale+ MPSoC Security and Software
Defines what safety and security is in the context of embedded systems and introduces several standards.

Zynq UltraScale+ MPSoC Power Management
Overview of the PMU and the power-saving features of the device.

Zynq UltraScale+ MPSoC System Coherency
Learn how information is synchronized within the API and through the ACE/AXI ports.

Zynq UltraScale+ MPSoC DDR and QoS
Understand how DDR can be configured to provide the best performance for your system.

Zynq UltraScale+ MPSoC Booting
How to implement the embedded system, including the boot process and boot image creation.

Zynq UltraScale+ MPSoC Ecosystem Support
Overview of supported operating systems, software stacks, hypervisors, etc.

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

Suggested: Understanding of the Zynq-7000 architecture
Familiarity with embedded operating systems

RELATED COURSES:

Embedded Systems Hardware Design Boot Camp for the Zynq UltraScale+ MPSoC

Updated 3-22-2023

©2023 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.