Getting Started with AMD Embedded x86 Processors Workshop
Getting Started with AMD Embedded x86 Processors Workshop
This online workshop introduces key concepts, tools, and techniques required for design and development using AMD embedded x86 processors, including Zen 5, Epyc, and Ryzen.
This course provides a structured approach to understanding AMD x86 architectures in embedded and high-performance computing environments. Participants will explore AMD Zen 5 microarchitecture innovations, instruction sets, memory subsystems, firmware, performance tuning, and platform security.
The emphasis of this course is on:
- Understanding AMD Epyc and Ryzen Zen 5 processors
- Mapping instruction sets, memory, and firmware
- Ensuring robust signal integrity and system reliability
- Exploring AMD firmware and the boot flow as well as platform security technologies
This course focuses on embedded x86 architectures.
COST:
AMD is sponsoring this workshop, with no cost to students. Limited seats available.
SCHEDULED EVENTS
Training Duration:
1 Day (6 hours)
Who should attend:
Embedded software developers and system architects as well as hardware designers and board engineers working on x86 platforms.
Software tools:
- AMD AOCL
- AMD uProf
hardware:
- Architecture: Zen
- Demo board: Lilac board
Skills Gained
After completing this comprehensive training, you will know how to:
- Evaluate AMD Zen 5 performance enhancements and architecture
- Map instruction sets for embedded deployments
- Apply memory initialization and training flows with the AGESA™ firmware
- Debug AGESA firmware configurations
- Implement platform security with AMD SME, SEV, and SEV-SNP technologies
- Utilize AOCL libraries and validate workloads
- Optimize performance profiling using AMD uProf
Course Outline
| Day 1 |
|---|
| AMD Zen 5 Microarchitecture Discusses AMD Zen 5 enhancements for performance gains and AMD embedded portfolios {Lecture} Instruction Sets for x86 Embedded Architectures Describes key x86 extensions, identifies tuning strategies and compatibility checks. {Lecture} Signal Integrity in Embedded x86 Describes signal integrity principles. {Lecture} Memory Interface Transition Explores AMD memory, outlines initialization/training with AGESA firmware, and discusses validation/debug methodologies. {Lecture} AMD Firmware Stack Overview Defines the concept of firmware and the boot process, and describes UDK AGESA components. {Lecture} Platform Security Explains platform security concepts, and describes AMD SME, SEV, SEV-SNP technologies. {Lecture} DEMO: Optimizing x86 Embedded Performance DEMO: Optimizing Performance on AMD Platforms: AMD uProf |
Please note: The instructor may change the content order to provide a better learning experience.
Prerequisites:
- Basic knowledge of x86 architecture and AMD processors
- Familiarity with power delivery memory subsystem principles
- Experience with firmware development and profiling tools