Designing DSP Applications with Versal AI Engines Workshop

This workshop covers the AMD Versal AI Engine architecture and using the AI Engine DSP Library, system partitioning, rapid prototyping, and custom coding of AI Engine kernels. Developing AI Engine DSP designs using AMD Vitis Model Composer is also demonstrated.

The emphasis of this course is on:

Providing an overview of the AI Engine architecture
Utilizing the Vitis DSP library for AI Engines
Performing system partitioning and planning
Adding custom kernel code for designs
Creating AI Engine DSP designs using Vitis Model Composer
Analyzing reports using Vitis Analyzer

COST:

AMD is sponsoring this workshop, with no cost to students. Limited seats available.

SCHEDULED CLASSES

Live Online Training (10am-4pm ET)

August 20, 2025

Training Duration:

1 Day (6 hours)

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Who should attend:

DSP users, software and hardware developers, system architects, and anyone who needs to accelerate their software
applications using our devices.

Skills Gained

After completing this comprehensive training, you will know how to:

Describe the AMD Versal AI Engine architecture
Utilize the AI Engine DSP library and create a filter design with the AMD Vitis Unified IDE
Follow the system partitioning and system mapping methodology
Add custom kernel code to a design
Design a DSP function with the Vitis Model Composer AI Engine library
Analyze AI Engine designs using the Vitis Analyzer utility

Course Outline

Day 1
AMD Versal AI Engine Architecture Introduces the architecture of the AI Engine and its components. Introduction to the AI Engine DSP Library Provides an overview of the AI Engine DSP library, which enables faster development and comes with ready-to-use example design that help with using the library and tools. System Partitioning Methodology Covers the system design planning and partitioning methodology for mapping design requirements to the AI Engine. Rapid Prototyping and Custom Coding of AI Engine Kernels Describes the AI Engine programming flow with kernels and Adaptive Data Flow (ADF) graphs. Also outlines the kernel coding methodology for writing custom kernel code and rapid prototyping. Overview of AI Engine Kernel Optimization Highlights the various AI Engine kernel optimization techniques, such as compiler directives, software pipelining, coding for performance, and core utilization. Analyzing AI Engine Designs Using the Vitis Analyzer Covers the different reports generated by the Vitis Unified IDE and how to use these reports to optimize and debug AI Engine kernels. AI Engine DSP Designs with Vitis Model Composer Describes the Vitis Model Composer tool and how to use the libraries available with the tool for AI Engine DSP design development. DEMO: Introduction to the AI Engine DSP Library DEMO: System Partitioning Methodology DEMO: AI Engine DSP Designs with Vitis Model Composer

Day 1

AMD Versal AI Engine Architecture
Introduces the architecture of the AI Engine and its components.

Introduction to the AI Engine DSP Library
Provides an overview of the AI Engine DSP library, which enables faster development and comes with ready-to-use example design that help with using the library and tools.

System Partitioning Methodology
Covers the system design planning and partitioning methodology
for mapping design requirements to the AI Engine.

Rapid Prototyping and Custom Coding of AI Engine Kernels
Describes the AI Engine programming flow with kernels and
Adaptive Data Flow (ADF) graphs. Also outlines the kernel coding
methodology for writing custom kernel code and rapid prototyping.

Overview of AI Engine Kernel Optimization
Highlights the various AI Engine kernel optimization techniques,
such as compiler directives, software pipelining, coding for
performance, and core utilization.

Analyzing AI Engine Designs Using the Vitis Analyzer
Covers the different reports generated by the Vitis Unified IDE
and how to use these reports to optimize and debug AI Engine
kernels.

AI Engine DSP Designs with Vitis Model Composer
Describes the Vitis Model Composer tool and how to use the
libraries available with the tool for AI Engine DSP design
development.

DEMO: Introduction to the AI Engine DSP Library

DEMO: System Partitioning Methodology

DEMO: AI Engine DSP Designs with Vitis Model Composer

Please note: The instructor may change the content order to provide a better learning experience.

Prerequisites:

Comfort with the C/C++ programming language
Vitis tool for acceleration development flow
Comfort with basic signal processing concepts
Basic knowledge of Versal AI Engine architecture and programming

RELATED COURSES:

- Embedded Heterogenous Design

Updated 03-12-2025

©2025 Advanced Micro Devices, Inc. Xilinx, Inc. is now part of AMD. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Advanced Micro Devices, Inc.