Designing with UltraScale FPGA Transceivers
Designing with UltraScale FPGA Transceivers
DEPRECATED COURSE: This course is older and no longer offered with our regular course list. It is only available as a private class.
COURSE CODE: CONN MGT-US
Learn how to employ serial transceivers in your UltraScale FPGA design. Understand and utilize the features of the serial transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock correction, and comma detection. Additional topics include use of the UltraScale FPGAs Transceiver Wizard, synthesis and implementation considerations, board design as it relates to the transceivers, and test and debugging. This course combines lectures with practical hands-on labs.
Learn more about UltraScale from AMD.
| 2-Day Instructor-led Course | Price USD | Training Credits |
|---|---|---|
| Hosted Online - $600/day | $1200 | 12 |
| In-Person Public Registration - $600/day | $1200 | 12 |
| Printed Course Book (A PDF book is included in the course fee) | $100 | 1 |
| Private Training | Learn More | Learn More |
| Coaching | Learn More | Learn More |
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Who should attend:
FPGA designers and logic designers
Skills Gained
After completing this comprehensive training, you will know how to:
- Describe and utilize the ports and attributes of the serial transceiver in UltraScale FPGAs
- Effectively utilize the following features of the gigabit transceivers:64B/66B and other encoding/decoding, comma detection, clock correction, and channel bonding, Pre-emphasis and receive equalization
- Use the UltraScale FPGAs Transceivers Wizard to instantiate GT primitives in a design
- Access appropriate reference material for board design issues involving signal integrity and the power supply, reference clocking, and trace design
- Use the IBERT design to verify transceiver links on real hardware
Course Outline
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Please note: The instructor may change the content order to provide a better learning experience.
Prerequisites:
- Verilog or VHDL experience or the Designing with Verilog or Designing with VHDL course
- Familiarity with logic design (state machines and synchronous design)
- Basic knowledge of FPGA architecture and Xilinx implementation tools is helpful
- Familiarity with serial I/O basics and high-speed serial I/O standards is also helpful