Versal Adaptive SoC (ASoC)

Versal ACAP vs Versal Adaptive SoC

You may have heard the term Versal ACAP. Now, there’s Versal Adaptive SoC. What are they? What’s the difference? Let us explain. What is the Versal ACAP? In 2018, AMD Xilinx introduced the first adaptive compute acceleration platform, commonly known as an ACAP. The ACAP provides the robust functionality of an FPGA with adaptable programming … Continued
Xilinx Vivado Synthesis

What Does Xilinx Vivado Do During the Synthesis Build Step?

What Does Xilinx Vivado Do During the Synthesis Build Step? One of BLT's expert FPGA engineers demonstrates the Vivado synthesis build step in the video below. Interested in learning more about Vivado? Check out some of our available courses: Vivado Boot Camp for the FPGA User Phase 1: FPGA Essentials – Architecture, Memory and IO … Continued
AMD- Xilinx Training

The State of BLT’s AMD – Xilinx Training – Fall 2022 Update

With AMD’s acquisition of Xilinx earlier this year, many of our Clients and prospective students have wondered what this means for BLT’s Xilinx training services. While the "State of Training" would typically come in February, we're presenting it now to update everyone on what's changed, what hasn't and where things are going. Xilinx training is … Continued
Attending Tech Shows 2022

Getting Out & About at High-Tech Shows

Industry trade shows and conventions are always an exciting chance to get out of the office and explore new applications for FPGA technologies. Plus, we get to meet new prospects and connect with old friends.  This March, BLT team members got to attend two events exploring new horizons in technology (literally and figuratively)—one in our … Continued
FPGA Career with a Mission

For a Fulfilling Career, Choose a Job with a Mission

A Job with a Mission As a design engineer, there are any number of places you can put your expertise to use. But if you want your FPGA career to mean something more, there’s a good chance you’ll find more fulfillment at a workplace with a mission—someplace like BLT. At BLT (formerly Bottom Line Technologies, … Continued
Xilinx ACAP

What Is the Versal ACAP?

What Is an ACAP? In 2018, Xilinx® introduced the industry’s first adaptive compute acceleration platform, commonly known as an ACAP. If you’re new to this technology, here’s a quick primer to get your started. What it Is Xilinx describes the ACAP as “a highly integrated multi-core heterogeneous compute platform that can be changed at the … Continued

Spartan-6 Migration: What You Need to Know

Does Your Spartan-6 Based Design Need to Stay in Production? The Xilinx® Spartan-6® FPGA chip is a workhorse. But—as you’ve no doubt heard—the Spartan-6 is experiencing significant supply chain issues. Supplies are extremely limited and lead times far exceed those of newer Xilinx products. So now’s the time to consider whether your designs depend on Xilinx … Continued

What It’s Like to Work at BLT

BLT is always on the lookout to recruit stellar FPGA engineers and design engineers. Naturally, many of these candidates want to know about the culture and day-to-day experience at BLT. So we sat down with two project engineers to share their impressions of what working at BLT is like.   The Challenge Obviously, a big … Continued
Bottom Line Name

BLT’s Name: What’s the Bottom Line?

We’re BLT. And That’s the Bottom Line. What’s in a name? Well, for a legal business entity, lots. So it’s important that we—and you, our Clients, partners and prospects—are clear about who BLT is. The Beginning: Bottom Line Technologies BLT was founded as Bottom Line Technologies, Inc. in 1989. Our president, Ed McCauley, held BLT … Continued
HLS Patch for Vitis and Vivado

HLS Patch for Vitis and Vivado

Xilinx releases HLS Patch to Fix Export Error If you use HLS in the Xilinx® Vitis™ and/or Vivado® tools, you may have encountered an export error. The error began on January 1, 2022. This applies to designs for Versal® ACAPs, Zynq® UltraScale+ MPSoCs and other devices that use high-level synthesis. This new error causes the … Continued