Melbourne, FL:

BLT Adaptive Computing Summit

Date:

May 2, 2023

Time:

8:00 am – 5:00 pm EST

Location:

Hilton Melbourne
7247 Rialto Place
Melbourne, FL 32812

Cost:
  • $199 per person (or 2 AMD Xilinx Training Credits)

The ticket price includes: the cost of attending the event, parking, hot breakfast, hot lunch, breaks, beverages, and the networking reception.

Limited tickets available. This is an in-person event. Attendance is capped at 120 persons.

Parking:

Self parking is available at the hotel at no cost. The parking lot to the left of the main door is closest to our event, and there is a separate hotel entrance for the summit, accessible from that left side parking lot.

 

REGISTRATION IS CLOSED

Summit Agenda

TIMESESSION
8:00 - 9:00Registration & Breakfast
9:00 - 9:15Opening Remarks
9:15 - 10:00RFSoC Case Study: SAR on Orbit
  • Low-Voltage IO for defense grade parts and considerations when using DDR4
  • Reliable and Safe State Machines for LEO
  • Introduction to SAR and the benefits of a space-based approach
10:00 - 10:30An Introduction to Versal, presented by AMD
10:30 - 10:45Break
10:45 - 11:30Common DSP Function Benchmarks (FIR, FFT and Matrix) – AIE vs. PL
11:30-12:00Managing FPGA & SoC Projects: The Methodologies Behind BLT's Secrets to Success
  • BLT's design methodologies for successful projects on the first try, every time
  • How to make the tools work efficiently and quickly on large designs
12:00 -1:00Lunch
1:00 - 1:30STAP Radar design – development flow and results
1:30 - 2:15Versal Channelizer Benchmark (AI vs PL)
  • A comparison of results when implementing in Programmable Logic vs AI Engines
  • Expectations on power consumption
  • Trade-study between each approach
2:15 - 2:30Break
2:30 - 3:00DEMO: Cross Triggering Is Your (Powerful) Friend
  • Tips and tricks for debugging SoCs and systems which contain software and programmable logic
  • Live Demonstration which shows engineers how to enable this capability for their designs
3:00-3:30System Mapping Tool – Deciding what goes in AIE and what goes in DSP58 (Versal)
3:30 - 4:00Engineering Roundtable: Space-Grade and Debugging Topics
  • Panel of Experts will provide valuable information and answer audience questions
  • Space-Grade Parts
  • Advanced Debugging Tips & Tricks for FPGA and SoC design
4:00Closing Remarks
4:00 - 5:00Networking Reception
One Event, Four Locations:

Columbia, MD

April 25, 2023

Melbourne, FL

May 2, 2023

Orlando, FL

May 4, 2023

Huntsville, AL

May 17, 2023

BLT is the exclusive AMD Xilinx in-person Authorized Training Provider for the Southeast region.
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