Embedded C/C++ SDSoC® Development Environment and Methodology

This one-day course is structured to help designers new to the SDSoC® development environment to quickly create accelerated systems. The focus is on utilizing the tools to accelerate an existing design at the system architecture level, not on the optimization of the accelerator microarchitectures. Several optional modules are provided to quickly provide students with the necessary background on both hardware and software. The first half of this class is Level 1 while the afternoon's topics are at Level 2.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Identify candidate functions for hardware acceleration by using the TCF profiling tool
  • Use the System Debugger's capabilities to control the execution flow and examine memory and variables during a debug session
  • Move designated software functions to hardware and estimate the performance of the accelerator and the effect on the entire system
  • Override tool defaults to improve the performance of the individual accelerators and the overall system

Course Outline

Day 1

  • Zynq® AP SoC Architecture Support for Accelerators [Optional]Discusses the relevant aspects of the Zynq® All Programmable SoC architecture for accelerator design. The focus is on AXI ports and protocols, system latency, and memory utilization.
  • Software Overview [Optional]Provides a thorough understanding of how the integrated design environment works, including how the compiler and linker behave, basics of makefiles, DMA usage, and variable scope.
  • SDSoC® Tool OverviewIntroduces the purpose, underlying structures, and basic functionality of the SDSoC® development environment through a combination of lecture and demonstration. Student will cement their knowledge with a lab that reinforces the concepts provided in the lecture and demo.
  • SDSoC® Tool Design Best PracticesIllustrates common mistakes and how to avoid them. Also describes approaches to refactoring software for hardware acceleration.
  • Application ProfilingProfiling is the process that identifies how the proces

No Scheduled Sessions - Contact Us to ask about setting one up!

Education Investment Options

Standard Registration
$900
Standard Registration
9 Training Credits
Advanced Registration
$800
Advanced Registration
8 Training Credits
Basic Follow-on Coaching
$500
Comprehensive Follow-on Coaching
$800
  • To qualify for the Advanced Registration Price, full payment must be received 21 days prior to the first day of class.
  • Basic follow-on coaching includes 2 hours (max 2 calls)
  • Comprehensive follow-on coaching includes 10 hours (max 5 calls)
  • Follow-on Coaching must be purchased at time of registration.
To Register For This Course Please Call 1-888-XILINX-1

Training Duration:

1 Day

Who should attend:

Anyone interested in quickly adding hardware acceleration to a software system.

Prerequisites

Understanding of Zynq®-7000 architecture (with emphasis on ACP, HP ports, and internal routing)

Comfort with the C programming language

Familiarity with the Vivado Design Suite, Vivado HLS tool, and Xilinx SDK

Software Tools

SDx development environment 2016.3

Hardware

Architecture: Zynq®-7000 All Programmable SoC*Demo board: Zynq®-7000 All Programmable SoC ZC702 or ZedBoard** This course focuses on the Zynq®-7000 All Programmable SoC. Check with your local Authorized Training Provider for the specifics of the in-class lab board or other customizations.

Last Updated: 2019-06-06_1626