Introduction to the Zynq® All Programmable SoC Architecture

This course provides hardware and firmware engineers with the knowledge to effectively utilize a Zynq® All Programmable System on a Chip (SoC). It covers the architecture of the ARM Cortex®-A9 processor-based processing system (PS) and the integration of programmable logic (PL).

The course details the individual components that comprise the PS: I/O peripherals, timers, caching, DMA, interrupt, and memory controllers. Emphasis is placed on effective access and usage of the PS DDR controller from PL user logic, efficient PL-to-PS interfacing, and design techniques, tradeoffs, and advantages of implementing functions in the PS or the PL.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Describe the architecture and components that comprise the Zynq® All Programmable SoC processing system (PS)
  • Evaluate a processing system (PS) and programmable logic (PL) AXI interfaceIdentify the configuration options for the Zynq® All Programmable SoC

Course Outline

Day 1

  • Zynq® All Programmable SoC Overview
  • Inside the Application Processor Unit (APU)
  • Processor Input/Output Peripherals
  • Lab 1: Building a Zynq® All Programmable SoC Platform
    Examine the process of using the Vivado IP Integrator tool to create a simple processing system.
  • Zynq® All Programmable SoC PS/PL Interface
  • Lab 2: Integrating Programmable Logic on the Zynq® All Programmable SoC
    Experiment with effectively using the PS DMA controller to move data between DDRx memory and a custom PL peripheral.
  • Lab 3: Impact of Port Selection on System Performance
    Explore bandwidth issues surrounding the use of the Accelerator Coherency Port (ACP) and the High Performance (HP) ports.
  • Zynq® All Programmable SoC Booting
  • Zynq® All Programmable SoC Memory Resources
  • Lab 4: Running and Debugging a Linux Application on the Zynq® All Programmable SoC
    Explore a software application executing under the Linux operating system on the Zynq® All Programmable SoC

No Scheduled Sessions - Contact Us to ask about setting one up!

Education Investment Options

Standard Registration
$800
Standard Registration
8 Training Credits
Advanced Registration
$700
Advanced Registration
7 Training Credits
Basic Follow-on Coaching
$500
Comprehensive Follow-on Coaching
$700
  • To qualify for the Advanced Registration Price, full payment must be received 21 days prior to the first day of class.
  • Basic follow-on coaching includes 2 hours (max 2 calls)
  • Comprehensive follow-on coaching includes 10 hours (max 5 calls)
  • Follow-on Coaching must be purchased at time of registration.
To Register For This Course Please Call 1-888-XILINX-1

Training Duration:

1 Day

Who should attend:

Hardware and firmware engineers who are interested in implementing a system on a chip using the Zynq® All Programmable SoC and programmable logic.

Prerequisites

FPGA design experience

Completion of the Vivado Boot Camp: Basic Training course or equivalent knowledge of Xilinx Vivado software implementation tools

Basic understanding of C programming

Basic understanding of microprocessors

Some HDL modeling experience

Software Tools

Vivado Design or System Edition 2017.1

Hardware

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Last Updated: 2019-06-06_1626