C-based HLS Coding for Hardware Designers

C-based coding is increasingly used for the modeling and high-level synthesis of hardware components. This course provides hardware engineers with sufficient knowledge of C-programming techniques for Vivado HLS to take advantage of Xilinx FPGAs. Learn high-level synthesis best practices, methodology, and subtleties of C-based coding for hardware modeling, synthesis, and verification.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Describe the difference between software programming and hardware design
  • Model and simulate hardware components using CCode hardware components in C for high-level synthesis

Course Outline

Day 1

  • Introduction to Software Design for Hardware Designers
  • C-based Algorithmic Coding for Hardware
  • Lab 1: High-Level Synthesis of a C Model
    Use various techniques and directives in Vivado HLS to improve design performance. The design under consideration accepts an image in a (custom) RGB format, converts it to the YUV color space, and applies a filter to the YUV image and converts it back to RGB.
  • C-based Test Bench Coding
  • Lab 2: Creating a C-based Test Bench
    Develop a verification environment used for testing a C-based design and verification in Vivado HLS. The design under consideration is the same design used in the previous lab, a YUV filtr.

No Scheduled Sessions - Contact Us to ask about setting one up!

Education Investment Options

Standard Registration
Standard Registration
8 Training Credits
Advanced Registration
Advanced Registration
7 Training Credits
Basic Follow-on Coaching
Comprehensive Follow-on Coaching
  • To qualify for the Advanced Registration Price, full payment must be received 21 days prior to the first day of class.
  • Basic follow-on coaching includes 2 hours (max 2 calls)
  • Comprehensive follow-on coaching includes 10 hours (max 5 calls)
  • Follow-on Coaching must be purchased at time of registration.
To Register For This Course Please Call 1-888-XILINX-1

Training Duration:

1 Day

Who should attend:

Hardware engineers looking to utilize high-level synthesis


C, C++, or System C knowledgeHDL knowledgeHardware design

Software Tools

Vivado System Edition 2012.2



Last Updated: 2019-06-06_1626