BLT’s one day workshop demonstrates the tools and techniques required for both software and hardware accelerated design using the Vitis™ Unified Software platform.
Learn how Vitis™ helps accelerate C, C++, and AI applications for cloud, edge, and embedded designs in a single suite. Learn how to migrate embedded SDK projects and develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both embedded and cloud applications.
After completing this comprehensive training, you will know how to:
- Implement an effective software design environment for a Xilinx embedded system using the Vitis™ unified software platform
- Write a basic user application and run it on an embedded system platform
- Describe how the FPGA architecture lends itself to parallel computing
- Explain how the Vitis™ unified software environment helps software developers to focus on applications
- Create kernels from C, C++, or RTL IP using the RTL Kernel Wizard
- Profile the design using Vitis™
- Introduction to the Vitis™ Unified Software Platform
- Introduction to Hardware Acceleration
- Deploying Accelerated Designs in the Cloud
- Migrating Xilinx SDK Projects to the Vitis™ Platform
- Vitis™ Accelerated Libraries
- Debugging and Profiling using the Vitis™ Platform
Education Investment Options
- To qualify for the Advanced Registration Price, full payment must be received 21 days prior to the first day of class.
- Basic follow-on coaching includes 2 hours (max 2 calls)
- Comprehensive follow-on coaching includes 10 hours (max 5 calls)
- Follow-on Coaching must be purchased at time of registration.
Who should attend:
- Designers looking to migrate existing designs to the Vitis™ platform
- Digital Designers looking to deploy FPGA designs in the cloud
- Software engineers looking to accelerate C, C++, and AI solutions using Vitis™ and FPGAs